KEYWORDS: Metrology, 3D metrology, Line width roughness, Transmission electron microscopy, Etching, Critical dimension metrology, Line edge roughness, 3D modeling, Process control, Transistors
The logic and memory semiconductor device technology strives to follow the aggressive ITRS roadmap. The ITRS calls
for increased 3D metrology to meet the demand for tighter process control at 45nm and 32nm nodes. In particular, gate
engineering has advanced to a level where conventional metrology by CD-SEM and optical scatterometry (OCD) faces
fundamental limitations without involvement of 3D atomic force microscope (3D-AFM or CD-AFM). This paper reports
recent progress in 3D-AFM to address the metrology need to control gate dimension in MOSFET transistor formation.
3D-AFM metrology measures the gate electrode at post-etch with the lowest measurement uncertainty for critical gate
geometry, including linewidth, sidewall profile, sidewall angle (SWA), line width roughness (LWR), and line edge
roughness (LER). 3D-AFM enables accurate gate profile control in three types of metrology applications: reference
metrology to validate CD-SEM and OCD, inline depth or 3D monitoring, or replacing TEM for 3D characterization for
engineering analysis.
Continuing demand for high performance microelectronic products propelled integrated circuit technology into 45 nm
node and beyond. The shrinking device feature geometry created unprecedented challenges for dimension metrology in
semiconductor manufacturing and research and development. Automated atomic force microscope (AFM) has been used
to meet the challenge and characterize narrower lines, trenches and holes at 45nm technology node and beyond. AFM is
indispensable metrology techniques capable of non-destructive full three-dimensional imaging, surface morphology
characterization and accurate critical dimension (CD) measurements. While all available dimensional metrology
techniques approach their limits, AFM continues to provide reliable information for development and control of
processes in memory, logic, photomask, image sensor and data storage manufacturing. In this paper we review up-todate
applications of automated AFM in every mentioned above semiconductor industry sector. To demonstrate benefits
of AFM at 45 nm node and beyond we compare capability of automated AFM with established in-line and off-line
metrologies like critical dimension scanning electron microscopy (CDSEM), optical scatterometry (OCD) and
transmission electronic microscopy (TEM).
KEYWORDS: Metrology, Atomic force microscopy, Line width roughness, Line edge roughness, Scanners, Critical dimension metrology, Actuators, Silicon, Profiling, 3D metrology
Critical dimension atomic force microscope (CD-AFM or 3D-AFM) is an important metrology technique for full three-dimensional measurements of linewidth CD and sidewall shape. Recent improvements in the 3D-AFM platform design, including high-precision/low-drift sample stages and high resolution optics, have been coupled with 'enhanced CD' (eCD) scan mode and novel AFM tip design. Especially, the eCD mode features a fast scanning actuator system (FA) and a bottom corner transitional rescan algorithm (TRS). The actuation system utilizes high gain feedback electronics and high bandwidth piezoelectric actuator to pull away a slender tip much faster from a small trench sidewall. The transitional rescan algorithm detects a rising sidewall before rescanning the transition for better bottom corner profiling. The paper presents evaluation data to show these enhancements resulted in improved measurement capability for small trenches required for shrinking device size, better sidewall profiling, more accurate bottom CD and LWR/LER measurement, faster scan speed, and less tip wear [1]. All the improvements ensure 3D-AFM continues to have the lowest measurement uncertainty among all other dimension metrology techniques.
Development of OPC strategies, both model-based and rules-based, can be greatly accelerated by identifying and minimizing metrology bias during OPC iterations. The CD-SEM edge-detection algorithms best suited for precision on 90 nm and 65 nm node ground-rule structures often do not provide linear response across a wide range of line sizes, line-end gaps and other structures of interest during OPC refinement. To ensure that reliable metrology data is being fed into the OPC calculation engine, reference measurements that are independent of (a) feature size, (b) feature shape and (c) material composition must be made to optimize CD-SEM edge-detection for this application. We show the importance of on-line atomic force microscopy (AFM) measurements to improve CD-SEM measurements and speed turnaround of OPC model generation. Measurements are made on through-pitch and through-size lines and spaces, both after litho and after etch and compared with CD-SEM measurements.
The technology node of semiconductor device production is progressing to 65nm generation. For the 65nm photomasks, the target specifications of defect size and repair accuracy are 52nm and 7nm, respectively. Especially, real defects on photomasks are not only simple two-dimensional patterns but also three-dimensional shapes such as phase shift defects and contamination, thus we need to recognize defect shapes accurately. Additionally, AAPSM's Cr patterns overhang, and we have to measure defects on three-dimensional shapes. To evaluate them, we use an AFM metrology system, Dimension X3D (Veeco), having both precise CD measurement repeatability (2nm) and high resolution for defects. In this report, we show the performance of the AFM metrology system. First, we evaluated CD metrology performance, CD repeatbility about four type photomasks: NEGA-BIM, POSI-BIM, KrF-HT and ArF-HT, and all masks met specifications. Next, we evaluated defect pattern shapes and AAPSM and CPL mask patterns. Consequently, we have confirmed that the AFM metrology system has high performance for 65nm photomasks.
We discuss the aspects of three-dimensional AFM metrology relevant to 90 nm node processes, with extensions to 65 nm node and beyond. Important advances have been made, including deployment of silicon tips with diameter less than 70 nm as well as development of a novel algorithm for tip shape deconvolution. As primary case studies, we present detailed analyses of process and materials issues encountered during poly silicon etch and during 193 nm photolithography. Etched poly silicon shows shape details at the bottom of the line that are known to impact device performance both directly (by defining the physical gate length) and indirectly (by screening ion implantation). Our data from one particular process show that etch shape (CD and sidewall angle) varies strongly as the line pitch decreases from 500 nm to 260 nm, with sidewall angle changing by approximately 0.8 degrees per 100 nm pitch change. We also present data for a different etch process in which both CD and sidewall angle vary systematically across the wafer from center to edge, with the range of sidewall angles being ~2 degrees and CD varying by 20 nm. Resist is seen to have height and sidewall angle variation with pattern density and with linewidth at a given focus-exposure process point. In addition, resist profiles before resist trim show footing, standing waves and 3-dimensional sidewall roughness that are readily visualized and quantified with AFM measurements.
KEYWORDS: Semiconducting wafers, Metrology, Chemical mechanical planarization, Copper, Image resolution, Logic, System on a chip, Optical lithography, Stereoscopy, Lithography
We present 3-dimensional atomic force profiler (AFP) measurements on die-scale flatness after copper and STI CMP. True metrology is achieved for patterned wafers. Wafers are vacuum-mounted on a flat chuck, as they would be in a stepper, so wafer warpage and strain-related non-planarity are not present. The results of this new technique are compared against current measurement techniques. For logic, memory and System-on-a-chip, we discuss the implications of wafer planarity going into subsequent photolithography steps.
We demonstrate the measurement capabilities of the newly developed Atomic Force Profiler (AFP) as a CMP process metrology tool. AFP combines a TappingMode atomic force microscopy (AFM) with a long scan profiler stage and can be used to characterize post-CMP local and global planarization for current and future generations of device manufacturing. The AFP enables CMP measurements of dishing, erosion, plug recess, and surface texture, providing adequate lateral resolution to image individual deep sub-micron device features as well as capability to profile long scans across multiple dies. In this paper we demonstrate that AFP can be used for the process development and production monitoring of metal CMP. Automated measurement of deep sub-micron W plug recess/protrusion, damascene Cu lines recess/protrusion, as well as erosion due to W or Cu structures is presented.
Roughness on silicon wafers is becoming a critical surface parameter with the advent of improved semiconductor processes. Roughness levels in the order of 1 angstrom are routinely manufactured, challenging the limits of some micro-roughness measurement technologies. Additionally, measurement is moving from R&D and Q.A. areas into the manufacturing line placing more emphasis on speed of analysis, robustness, correlation and repeatability of the various techniques. This paper attempts to identify, review, and correlate suitable techniques for measurement at such low levels of micro- roughness. The strengths and weakness of each technique from a production viewpoint are also touched upon. Wafer roughness measurements were used to characterize a set of semiconductor wafers with a varying dopant and process characteristics. One hundred, 8' bare wafer samples with various dopants were prepared for measurements in the order of 1 angstrom to 2 angstrom. The samples were then measured with different methods using total integrated scatter (TIS), atomic force microscopy (AFM), interferometry (IF) and optical profilometers (OP). These techniques differ in many ways in their assessment of surface roughness and the results from each technique are presented and a discussion of the correlation issues between the different measurement systems is given.
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