Proceedings Article | 20 March 2020
Alexander Verner, Hyunsok Kim, Ikhyun Jeong, Seungwoo Koo, Dongjin Lee, Honggoo Lee, Boaz Ophir, Ohad Bachar, Liran Yerushalmi, Sanghuck Jeon, Dongsub Choi, Jeongpyo Lee
Proc. SPIE. 11325, Metrology, Inspection, and Process Control for Microlithography XXXIV
KEYWORDS: Metrology, Optical parametric oscillators, Detection and tracking algorithms, Data modeling, Feature extraction, Optical testing, Scanning electron microscopy, Machine learning, Semiconducting wafers, Overlay metrology
In recent technology node manufacturing processes, on-product overlay (OPO) is becoming increasingly more important. In previous generations, the optimization of the total measurement uncertainty (TMU) itself was sufficient. However, with the use of modern technologies, target asymmetry-related measurement inaccuracy became a significant source of error, requiring new methods of control. This paper presents a machine learning (ML) based algorithm that reduces inaccuracy in misregistration measurements of the after-develop inspection (ADI) optical overlay (OVL). The algorithm relies on numerous features that were extracted from the OVL tool camera images, accuracy metrics derived from OVL computation, and other metadata. It is trained to estimate OVL measurement inaccuracy and produce corrected OVL per site. The ground truth of the ML model can include either internal or external OVL values. In the former case, the model is trained using wafer modeling errors (a.k.a. residuals), implying that these are a good indicator of target inaccuracy, which is a commonly used assumption. In the latter case, the model is trained using external overlay as the reference. If an accurate external reference overlay measurement exists, this option can be the most accurate. In both cases, the algorithm produces corrected OVL values. This study shows that for both ground truth options, the suggested method reduces inaccuracy and wafer modeling residuals in ADI optical OVL metrology measurements. The results were obtained by experimenting on production wafers from DRAM critical layers at SK Hynix. All the measurements were taken using an imaging-based overlay (IBO) technique and were validated by scanning electron microscope (SEM) measurements of the same wafers.
