Layout pattern density impacts mask critical dimension uniformity (MCDU) as well as wafer critical dimension
uniformity (WCDU) performances in some aspects. In patterning the dense contact array with negative tone
development (NTD) process, the abrupt pattern density change around the array edge of a NTD clear tone reticle arises
as a very challenging issue for achieving satisfactory WCDU. Around the array boundary, apart from the MCDU greatly
impacted by the abrupt pattern density change, WCDU in lithographic process is also significantly influenced by the
optical flare and chemical flare effects.
This study investigates the pattern density effect induced MCDU and WCDU variations. Various pattern densities are
generated by the combination of fixed array pattern and various sub-resolution assist feature (SRAF) extension regions
for quantifying the separated WCD variation budget contributed by MCD variation, chemical flare effect and optical
flare effect. With the proper pattern density modulation outside the array pattern on a clear tone reticle, MCD variation
across array can be eliminated, optical flare and chemical flare effects induced WCD variation is also greatly suppressed.
A post-developed defect unlike the traditional satellite spot was found in the self-aligned double patterning (SADP)
process flow. The defects tend to happen around boundary adjacent to the clear pattern area and finally yield pattern
distortion or bridging (called "distortion" hereafter). This distortion defect has been characterized as yield killer since it
causes word-line bridging after etching. This paper will describe the effect of resist type, top anti-reflective coating
(TARC), various development puddle/rinse schemes, hard bake (HB) and advanced defect reduction (ADR) function on
the distortion defect performance. TARC has been indentified as an effective solution to reduce the conventional satellite
defect but the experimental result on eliminating the distortion defect is not obvious. In resist processing, post-developed
HB temperature showed strong correlation to the distortion defect count. The distortion defect reduces as lowering the
HB temperature, and furthermore the defect can be fully eliminated by experimentally skipping the HB step. The
combination of multiple cycles of wafer agitation in the development puddle, double development puddle and scanning
rinse significantly suppresses the defect count. However, the aggressive development recipe has made the process time
too long to be acceptable for mass production. To minimize the throughput loss, ADR is another solution to eliminate the
distortion defect.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.