KEYWORDS: Ions, Ion implantation, Photoresist processing, System on a chip, Optical lithography, Double patterning technology, Etching, Antireflective coatings, Scanning electron microscopy, Photomasks
With regard to the resist-stacking process, it was proposed that the implantation of ions whose acceleration voltage was below 50 kV could make the lower-layer resist insoluble for the upper-layer resist-patterning process. However, the lower-layer resist pattern is observed to be removed after the upper-layer resist patterning in a pattern. In another type of a pattern, there are caves in the bottom of the lower-layer resist pattern after the upper-layer resist patterning. From the calculation of the projected range of the ions, it is found that the ions cannot reach the bottom of the lower-layer resist pattern, and therefore the bottom of the lower-layer resist is not hardened. The removal is due to the dissolution of the bottom in the lower-layer resist during the development of the upper-layer resist pattern. When the acceleration voltage of the implanted ions is set so that the projected range of the ions is larger than the resist thickness, the lower-layer resist can be made effectively insoluble for the upper-layer resist-patterning process. The ion-implanted pattern can be used as the etching mask. Moreover, the ions can be prevented from penetrating the film to be etched by adjusting the thicknesses of stacked antireflective coating.
It was shown previously that the double line and space formation method (DLFM) is superior to other methods for forming a dense contact hole (C/H) resist pattern by simulation, and a 0.30-k1 1:1 C/H resist pattern was formed experimentally. A through process of C/H formation from resist patterning to metal filling is presented. The oxide square C/Hs transferred from the resist pattern formed by the DLFM could be filled with metal, although the transferred C/Hs had square corners in comparison with the conventional C/H resist patterning. On the other hand, the combination of the DLFM and the “pack and cover process” makes it possible to form resist random C/Hs on grids. So, the possibility of forming random C/Hs filled with metal is shown. Moreover, the resolution limit of the DLFM is discussed. The 0.29-k1 (half pitch 65-nm) and 0.27-k1 (half pitch 56-nm) 1:1 C/H resist patterns could be formed with optimized dipole illumination. So, random C/Hs with k1 below 0.30 are expected to be formed.
KEYWORDS: Ions, Ion implantation, Optical lithography, System on a chip, Photoresist processing, Double patterning technology, Etching, Tin, Selenium, Scanning electron microscopy
With regard to the resist stacking process, it was proposed that the implantation of ions whose
acceleration voltage was below 50 kV could make the lower-layer resist insoluble for the upper-layer resist
patterning process. But the lower-layer resist pattern was observed to be peeled off in a pattern. In another
type of the pattern whose lower-layer pattern was fastened by the upper-layer pattern, there were caves in the
bottom of the lower-layer resist pattern. From the calculation of the projected range of the ions, it was found
that the ions cannot reach the bottom of the lower-layer resist pattern, so that the bottom of the lower-layer
resist was not hardened. The peeling-off was due to the dissolution of the bottom in the lower-layer resist
during the development of the upper-layer resist pattern. When the acceleration voltage of the implanted ions
is set so that the projected range of the ions is larger than the resist thickness, the lower-layer resist can be
made effectively insoluble for the upper-layer resist patterning process. The ion implanted pattern can be
used as the etching mask. Moreover, the ions can be prevented from penetrating the film to be etched by
adjusting the acceleration voltage.
It was shown previously that the Double Line and Space (L&S) Formation Method (DLFM) is superior to other
methods for forming a dense contact hole (C/H) resist pattern by simulation and 0.30 k1 1:1 C/H resist pattern was
formed experimentally. In this paper, a through process of C/H formation from resist patterning to metal filling is
presented. The square C/Hs transferred to an oxide film from the resist pattern formed by the DLFM could be filled
with metal, although the transferred C/Hs had square corners in comparison with the conventional C/H resist patterning.
On the other hand, the combination of the DLFM and the 'Pack and Cover Process' makes it possible to form resist
random C/Hs on grids. So, the possibility of forming random C/Hs filled with metal is shown. Moreover, the resolution
limit of the DLFM is discussed. 0.29 k1 (half pitch 65 nm) and 0.27 k1 (half pitch 56 nm) 1:1 C/H resist pattern could be
formed with optimized dipole illumination. So, random C/Hs with k1 below 0.30 are expected to be formed.
The double line and space (L&S) formation method with L&S masks and dipole illumination was found to have high capability to fabricate ~0.3 k1 contact hole (C/H) pattern. The procedure was as follows. The first L&S pattern was formed and was hardened to avoid the dissolution and mixing during the second resist coating. The second L&S pattern perpendicular to the first one was formed on the first resist pattern. The common space area of the two patterns became 1:1 C/H pattern. Simulation results showed that the double L&S formation method has much wider lithography latitude than other methods, such as single exposure of a C/H mask with quadrupole illumination, single exposure of a vortex mask with conventional illumination, and double exposure of L&S masks with dipole illumination to a single-layer resist. A 75 nm (0.30 k1) 1:1 C/H pattern was fabricated. An 80 nm (0.32 k1) 1:1 C/H pattern had 280 and 600 nm depth of focus in each resist layer at 8% exposure latitude. Moreover, a new method, in which a C/H mask replaces the L&S masks, is proposed to achieve cost reduction and the same high performance as the L&S masks.
The double line and space (L&S) formation method with L&S masks and dipole illumination was found to have high capability to fabricate about 0.3-k1 contact hole (C/H) pattern. The procedure was as follows. The first L&S pattern was formed and was hardened to avoid the dissolution and mixing during the second resist coating. The second L&S pattern perpendicular to the first one was formed on the first resist pattern. The common space area of the two patterns became 1:1 C/H pattern. Simulation results showed that the double L&S formation method has much wider lithography latitude than other methods, such as single exposure of a C/H mask with quadrupole illumination, single exposure of a vortex mask with conventional illumination, and double exposure of L&S masks with dipole illumination to a single layer resist. 75-nm (0.30-k1) 1:1 C/H pattern was fabricated. 80-nm (0.32-k1) 1:1 C/H pattern had 280 nm and 600 nm depth of focus (DOF) in each resist layer. Moreover, a new method, in which a C/H mask replaces the L&S masks, is proposed to achieve cost reduction and the same high performance as the L&S masks.
For low-k1 lithography, high accurate control of the development process is required. For that purpose, low- impact dispensing is one of the most effective approaches. In that process, development time differs between start and end position of nozzle-scan. To reduce the time lag, the nozzle-scan-speed of 140mm/s was selected. But critical dimensions (CD) offset that depends on scan-direction was detected. From the results of the CD and dissolution performances for three resists, we found that the pull-back flow of the developer was the main cause of the CD offset. Thus, it is important that the developer does not flow by its pull-back-force. By observing and analyzing the flow of the dissolution product with a video camera, the best condition of the scan-speed (=60 mm/s) was selected. Under this nozzle-scan condition, the dissolution rates did not depend on the scan-direction of the dispenser-nozzle. As a result, the small CD offset could be observed for 200nm L&S patterns.
The etch-back and laser-explosion process was proposed and reported for Levenson mask repair before. If convex defects and leveling film were etched by physical sputtering and remaining leveling film was removed by laser explosion in the etch-back and laser-explosion process, quartz (Qz) substrate was over-etched because the Ga implanted layer of Qz substrate was also removed by the laser explosion due to the transmittance decrease of the Ga implanted layer. In this paper, gas assisted etching with the mixture of XeF2 and O2 was applied to the etch-back and laser-explosion process. The coincident etching rate of Qz (phase shifter) with C film was obtained, which is an indispensable requirement for the etch-back process. The optical transmittance of Qz substrate after the repair was 95% for the light of 250 nm wavelength. The transmittance was sufficient to avoid over-etching of Qz substrate.
At the first stage of defect repair on masks with focused ion beam (FIB), it is necessary to recognize defects by imaging. One of the problems in halftone mask imaging by FIB is that the contrast between halftone (HT) film and quartz (Qz) substrate is not sufficient to recognize material. We investigated the methods of the defect area distinction in deep UV silicon nitride (SiNx) single-layer halftone masks to avoid the transmittance decrease of masks induced by FIB irradiation. The cause of the difficulty in the area distinction is that the difference between the mean secondary electron intensity of HT area and that of Qz area is small in comparison with the width of the secondary electron intensity distributions. A conventional filter was found to be effective to narrow the intensity distributions and the area of defects on halftone masks could be recognized by means of the image filter in the images obtained with a low FIB dose.
Topographical structures for a dual-trench type alternating phase-shifting mask whose shifters were made of perpendicular trenches with different depth alternately, have been successfully designed using direct Maxwell's equation solver. The structures could reduce the difference of the adjacent peak intensities of the grouped line image on the wafer due to light scattering effects at sidewalls of the trenches. Detailed design of the structures was performed in accordance with the concept of 'effective transmission' and 'effective phase error'. It was clear that the former could be controlled by shallow trench depth, and the latter, which was defined as the phase difference between 'effective phase difference' and 180 degrees, could be reduced by controlling the difference in depth between deep and shallow trenches. For 0.175micrometers lines and spaces, the optimum shallow and deep trench depths corresponded to approximately 270 degrees and 447 degrees in phase, respectively. After the optimization, the depth of focus obtained by exposure-defocus tree was about 0.9 times as large as that obtained for an ideal alternating PSM having rectangle-shaped distribution of complex transmission (Kirchhoff's assumption).
Experiments concerning silicon oxide deposition using a focused ion beam were carried out in order to apply silicon oxide as insulator in integrated circuit modification. Silicon oxide film was formed using a 25-keV gallium focused ion beam with a mixed gas of 1.3.5.7- tetramethylcyclotetrasiloxane and oxygen. The deposited film consisted of mainly silicon and oxygen, which was analyzed by micro-Auger electron spectroscopy. It also contained 5 percent gallium, but carbon content was below noise level. The ratio of silicon to oxygen was 1 to 2. It was found that carbon content depended on oxygen used as deposition source gas. The resistivities of the eight deposited silicon oxide films were measured. The resistivities wer 28-79 M(Omega) cm at 5 volts and these values did not change significantly even after the samples were left in a room for three months. It was determined that it will be possible to use deposited silicon oxide for integrated circuit modification.
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