We developed silicon-on-insulator (SOI) diode-based uncooled infrared focal plane arrays (IRFPAs), in which single-crystal pn junction diodes formed in an SOI layer are used as temperature sensors. These diodes, based on silicon large-scale integration technology, offer excellent uniformity, and have led to the use of high-performance uncooled IRFPAs in a wide variety of applications. In order to extend the pitch to less than 12 μm, a scalable new pixel structure has been developed to reduce the pixel size, based on a novel thermally isolated structure, which is fabricated above a CMOS processed wafer. The pn junction diodes used as a temperature sensor are separated from the underlying substrate by supporting legs made from thin metal wire, forming a cavity. To reduce the pixel size, we are developing a new diode structure by optimizing the ion implantation condition, thinning the SOI layer, and redesigning the supporting legs, achieving a smaller pixel size even with ten serially connected diodes. We also evaluated a new readout circuit architecture that enables an increase in sensitivity by generating a larger change in the diode forward voltage at a given temperature with no change in the number of diodes in the SOI layer. The effectiveness of the proposed readout circuit architecture was verified using a fabricated test element. The sensitivity of the test element was 128% of that for existing circuit structures, and further increases are expected with circuit structure optimization. These techniques have greatly enhanced the performance of our SOI diode based uncooled IRFPAs.
In this study, we develop a shutter-less algorithm for a silicon-on-insulator (SOI) diode uncooled infrared focal plane array (IRFPA). The optimal non-uniformity correction is calculated onboard. The effectiveness of the proposed algorithm was verified using a prototype uncooled IR camera. The performance of the shutter-less algorithm was studied by measuring a fixed pattern noise (FPN) at different correction points and verification of favorable camera operation. Even at two correction points, the FPN was at a practical level. The temperature behavior of the proposed SOI diode is highly uniform and predictable, which leads to simpler device modeling and therefore simpler shutter-less operation. A new pixel structure was also developed for pixel size reduction. This approach is based on the realization of a novel thermal isolation structure that can be fabricated by post processing on top of CMOS wafers. Ten series diodes can be arranged in a pixel by designing a 12 μm pixel pitch IRFPA with the new pixel structure. These developed technologies have significantly enhanced the performance of the SOI diode uncooled IRFPA, which inherently possesses excellent uniformity and low noise.
We develop a shutter-less method for replacing mechanical shutters. To verify the effectiveness of the proposed method, we fabricated a silicon-on-insulator (SOI) diode uncooled 320 × 240 infrared focal plane array (IRFPA) with 17 μm pixel pitch utilizing a circuit architecture that achieves thermo-electric cooling (TEC)-less operation. Furthermore, we fabricated a prototype uncooled IR camera that implements the proposed method and verified favorable camera operation. The temperature behavior of our proposed SOI diode is highly uniform and predictable, which enables simpler device modeling and consequently simpler TEC-less and shutter-less operation.
Infrared (IR) polarimetric imaging is a promising approach to enhance object recognition with conventional IR imaging for applications such as artificial object recognition from the natural environment and facial recognition. However, typical infrared polarimetric imaging requires the attachment of polarizers to an IR camera or sensor, which leads to high cost and lower performance caused by their own IR radiation. We have developed asymmetric mushroom plasmonic metamaterial absorbers (A-MPMAs) to address this challenge. The A-MPMAs have an all-Al construction that consists of micropatches and a reflector layer connected with hollow rectangular posts. The asymmetric-shaped micropatches lead to strong polarization-selective IR absorption due to localized surface plasmon resonance at the micropatches. The operating wavelength region can be controlled mainly by the micropatch and the hollow rectangular post size. AMPMAs are complicated three-dimensional structures, the fabrication of which is challenging. Hollow rectangular post structures are introduced to enable simple fabrication using conventional surface micromachining techniques, such as sacrificial layer etching, with no degradation of the optical properties. The A-MPMAs have a smaller thermal mass than metal-insulator-metal based metamaterials and no influence of the strong non-linear dispersion relation of the insulator materials constant, which produces a gap in the wavelength region and additional absorption insensitive to polarization. A-MPMAs are therefore promising candidates for uncooled IR polarimetric image sensors in terms of both their optical properties and ease of fabrication. The results presented here are expected to contribute to the development of highperformance polarimetric uncooled IR image sensors that do not require polarizers.
We report the development of a 2-million-pixel, that is, a 2000 x 1000 array format, SOI diode uncooled IRFPA with 15
μm pixel pitch. The combination of the shrinkable 2-in-1 SOI diode pixel technology, which we proposed last year ,
and the uncooled IRFPA stitching technology has successfully achieved a 2-million-pixel array format. The chip size is
40.30 mm x 24.75 mm. Ten-series diodes are arranged in a 15 μm pixel. In spite of the increase to 2-million-pixels, a
frame rate of 30 Hz, which is the same frame rate as our former generation (25 μm pixel pitch) VGA IRFPA, can be
supported by the adoption of readout circuits with four outputs. NETDs are designed to be 60 mK (f/1.0, 15 Hz) and 84
mK (f/1.0, 30 Hz), respectively and a τth is designed to be 12 msec. We performed the fabrication of the 2-million-pixel
SOI diode uncooled IRFPAs with 15 μm pixel pitch, and confirmed favorable diode pixel characteristics and IRFPA
operation where the evaluated NETD and τth were 65 mK (f/1.0, 15 Hz) and 12 msec, respectively.
Scalable new SOI diode structure has been proposed and developed for beyond 17μm pixel pitch mega-pixel-class SOI
diode uncooled infrared focal plane arrays (IRFPAs). Conventionally, each p+n vertical diode is formed between a p+diffusion and an n-body in each SOI active area, and 8-10 diodes are serially connected with interconnections. In the
proposed new structure, we employ two kinds of diodes, namely, p+n and n+p vertical diodes. First, two regions of an nbody
and a p-body are prepared in an SOI active area. In the n-body, a p+ diffusion is formed apart from the n-body /pbody
boundary. In the p-body, an n+ diffusion is formed apart from the boundary. In this way, a p+n vertical diode and an
n+p vertical diode are formed together in an SOI active area. Moreover, a contact hole, which is formed in touch with
both n- and p-bodies, electrically connects these two kinds of diodes. With this new structure which is named "new 2-in-
1 SOI diode structure", we have realized remarkable reduction of the diode area. It leads to significant increase of the
diode series number in a pixel, which increases infrared responsivity of the pixel. As a result, designing a 15μm pixel
pitch IRFPA with the new structure, 12 series diodes can be arranged in a pixel, although 10 series diodes have been
used even in the case of our 25μm pitch generation pixel.
To confirm the ability of the new diodes, test elements of 12-17μm pitch pixels were fabricated and evaluated.
Furthermore, the fabrication of 17μm pixel pitch 320 x 240 IRFPAs with the new diodes was carried out and their
favorable FPA operations were successfully verified.
In conclusion, the proposed and developed new SOI diode technology is very promising for beyond 17μm pixel pitch
mega-pixel-class uncooled IRFPAs.
We have developed a novel readout circuit architecture realizing a TEC-less (Thermo-Electric Cooler) operation for an
SOI diode uncooled infrared focal plane array (IRFPA). Through the fabrication of an SOI diode uncooled 320 x 240
IRFPA adopting the readout circuit architecture with our existing 25μm pixel-pitch technology, we demonstrate that the
variation of the output DC level of the pixels is successfully suppressed in environmental temperatures from -10°C to
50°C. The developed TEC-less technology greatly enhances the ability of the SOI diode uncooled IRFPA, which
inherently possesses excellent uniformity and low noise features.
We have developed an uncooled IRFPA with a chip scale vacuum package and succeeded in obtaining excellent IR images of less than 60 mK in NETD. This package consists of a device chip and a silicon lid. The chip in this study is a 160 x 120 SOI diode IRFPA with a 25 μm pixel pitch. The size of the package is 14.5(L) x 13.5(W) x 1.2(H) mm. The gap between the device chip and the lid is controlled by the thickness of the vacuum sealing material. The lid is prepared by a wafer process and diced just before vacuum sealing. We use DLC (diamond like carbon) as the AR coat because of its high IR transmittance and high endurance in the wafer process. DLC films are deposited on both sides of the silicon lid wafer, and then a ring-shaped metal pattern for solder bonding is formed on one side of the lid wafer. Solder is mounted on the metal pattern by a molten solder ejection method. The patterned thin-film getter is formed on the lid wafer. Because of the use of patterned thin-film getter, there is no need to form a cavity on the lid to allow installation of getter or to insert a spacer between the device chip and the lid. Then the lid wafer is diced into individual lids. The device wafer and the lids are set in a vacuum chamber, which has a heater to melt the solder, so as to pair each die and lid. After pumping the chamber, the patterned thin-film getters are activated and then the lids are bonded simultaneously to the device wafer. Finally the device wafer is diced into individual chips. The measured pressure of the package is less than 0.5 Pa which is sufficient for obtaining high thermal isolation. In this technique, only the good dies in a wafer are packaged in chip scale simultaneously. Thus, a reduction in the size and cost of the package has been achieved.
Pixel scaling for SOI diode uncooled infrared focal plane arrays (IRFPAs) was investigated in order to achieve the realization of small size and low cost IRFPAs. Since the SOI diode pixel has two different layers -- one for the temperature sensor and the thermal isolation structure, and the other for the infrared absorption structure -- each layer can be independently designed. Hence, a high fill factor can be maintained when reducing pixel size without changing the basic structure of the pixel, which is advantageous in reducing the pixel size. In order to verify this, the authors have developed an SOI diode IRFPA with the pixel size of 28 μm x 28 μm which is 49% of the previous pixel size (40 μm x 40 μm) and achieved a noise equivalent temperature difference (NETD) of 87 mK. In order to further reduce the pixel size and to improve device sensitivity, we propose a new pixel structure. In this structure, a reflector is fabricated between the infrared absorption structure and support legs. Therefore, the infrared rays which are incident on the support legs, which do not sufficiently function as a reflector, can be used effectively. A new pixel structure with a pixel size of 25 μm x 25 μm was fabricated and realized the thermal conductance of 1.0 x 10-8 W/K and the infrared absorption structure was then verified for its effectiveness.
Because the semiconducting YBaCuO films which are fabricated by sputtering have a temperature coefficient of resistance (TCR) over 3%/K at room temperature, they are considered to be candidates for bolometer materials of uncooled infrared (IR) detectors. There is a problem, however, in that the resistivity of the films is over 10 (Omega) cm, which is two orders of magnitude higher than that of conventional VOX bolometer films. To decrease the resistance of the bolometers, we researched sputtering conditions of the YBaCuO films and combined them with comb-shaped electrodes. When the YBaCuO film was deposited on these electrodes by RF magnetron sputtering at room temperature in an atmosphere of 2% O2 and 98% Ar, it showed a resistivity of 90 Ωcm and a TCR of -3.2%/K; ultimately the YBaCuO bolometer resistance became 82 k(Omega) using the comb-shaped electrodes. The YBaCuO bolometer detector that contains an infrared absorbing membrane achieved a high fill factor of 90% and high infrared absorptance of 79%. Moreover, the detector showed a thermal conductance of 1.3x10-7 W/K and a responsivity of 6.8x105 V/W in a vacuum. The YBaCuO microbolometer FPA which we have developed has an array format of 320x240 pixels and a pixel pitch of 40 μm. The FPA showed a noise equivalent temperature difference (NETD) of 0.08 K with a prototype camera and f/1.0 optics.
A 320 X 240 uncooled IR focal plane array (IRFPA) with series PN junction diodes fabricated on a silicon-on- insulator (SOI) wafer has been developed. Resistive bolometers, pyroelectric detectors and thermopile detectors have been reported for large scale uncooled IRFPAs, while the detector developed uses the temperature dependence of forward-biased voltage of the diode. The diode has low 1/f noise because it is fabricated on the monocrystalline SOI film which has few defects. The diode is supported by buried silicon dioxide film of the SOI wafer, which becomes a part of a thermal isolated structure by using bulk silicon micromachining technique. The detector contains an absorbing membrane with a high fill factor of 90 percent to achieve high IR absorption, and the readout circuit of the FPA contains a gate modulation integrator to suppress the noise. Low cost IRFPA can be supplied because the whole structure of the FPA is fabricated on commercial SOI wafers using a conventional silicon IC process.
A camera using an uncooled infrared image sensor has been developed. This image sensor is a bolometer focal plane array (FPA), of which the readout circuit is designed to minimize the temperature drift or the pattern noise caused by the changes of the ambient temperature. The circuit has a bolometer for the load resistor, which has the same temperature coefficient of resistance as that of the pixel bolometer. Therefore the signal change induced by the temperature change of the FPA substrate is reduced because the resistance change of the load bolometer compensates for that of the pixel bolometer. The effectiveness of the drift- compensating circuit has been confirmed with a prototype handheld camera.