Applications that require overlay measurement between layers separated by absorbing interlayer films (such as α-
carbon) pose significant challenges for sub-50nm processes. In this paper scatterometry methods are investigated as an
alternative to meet these stringent overlay metrology requirements. In this article, a spectroscopic Diffraction Based
Overlay (DBO) measurement technique is used where registration errors are extracted from specially designed
diffraction targets. DBO measurements are performed on detailed set of wafers with varying α-carbon (ACL)
thicknesses. The correlation in overlay values between wafers with varying ACL thicknesses will be discussed. The total
measurement uncertainty (TMU) requirements for these layers are discussed and the DBO TMU results from sub-50nm
samples are reviewed.
Various pupil-fill measurement techniques are evaluated to monitor non-telecentricity of an illuminator as followings: transmission image sensor (TIS) of ASML, source metrology instrument (SMI) of Litel, Fresnel zone plate (FZP) of Philips, and non-telecentricity measurement technique using traditional overlay marks, which is based on an idea that pattern shift is proportional to the amount of defocus. Based on aerial image simulation with measured non-telecentricity, its effect on sub-70 nm device patterning is discussed. Experimental data shows that some of pupil-fills appear more than 70 milli-radian of source displacement error and it may cause serious pattern shift and/or asymmetry. Detailed descriptions of measurement techniques and experimental results are presented.
Due to the polarization effect of high NA lithography, the consideration of resist effect in lithography simulation becomes increasingly important. In spite of the importance of resist simulation, many process engineers are reluctant to consider resist effect in lithography simulation due to time-consuming procedure to extract required resist parameters and the uncertainty of measurement of some parameters. Weiss suggested simplified development model, and this model does not require the complex kinetic parameters. For the device fabrication engineers, there is a simple and accurate parameter extraction and optimizing method using Weiss model. This method needs refractive index, Dill’s parameters and development rate monitoring (DRM) data in parameter extraction. The parameters extracted using referred sequence is not accurate, so that we have to optimize the parameters to fit the critical dimension scanning electron microscopy (CD SEM) data of line and space patterns. Hence, the FiRM of Sigma-C is utilized as a resist parameter-optimizing program. According to our study, the illumination shape, the aberration and the pupil mesh point have a large effect on the accuracy of resist parameter in optimization. To obtain the optimum parameters, we need to find the saturated mesh points in terms of normalized intensity log slope (NILS) prior to an optimization. The simulation results using the optimized parameters by this method shows good agreement with experiments for iso-dense bias, Focus-Exposure Matrix data and sub 80nm device pattern simulation.
Stray light is analyzed by scattering range. For the short range, stray light distributes as 1/r4 and comes from aberration. For the mid range and the long range, in the assumption of Gaussian distribution, characteristic scattering length of specific tools is estimated. EOR is proposed which contains information of layer geometry and scattering range characteristic of flare. To minimize CD errors from OPC, flare level and EOR should be considered in the OPC procedure.
Layer specific illumination has merits of enhancement of resolution, widening DOF and image fitness. For dense patterns like DRAM cell, layer specific illumination is a major candidate to drive low k1 lithography. To find out the best illumination for a specific pattern, diffracted image of the pattern and the ratio of captured first order to 0th order diffracted beam should be considered. By spectrum analysis, the best illumination is obtained for simple patterns like dense lines, brick wall, and dense contacts. In this paper, the procedure of obtaining the best illumination for specific patterns is presented. Comparing general illuminations such as annular, the resultant illumination is proved to have wider DOF and enhancement of resolution. The best illumination can also be found by Monte Carlo simulation. For simple one-dimensional case, its validity is proved. From the exposure results, wide DOF and enhancement of resolution is confirmed.
Process windows, MEEF (Mask Error Enhancement Factor), flare, aberration effect of the CLM (Cr-less PSM) were measured by the simulations and experiments for the various DRAM cell patterns compared with 6% transmittance HTPSM in the ArF lithography. We designed CLM layouts of sub 100nm node DRAM cells concerning the mask manufacturability, maximizing the NILS (Normalized Image Log Slope) and minimizing the MEEF with a semi-automatic OPC tool. Isolation, line and space and various contact patterns showed increasing process windows compared with HTPSM and this strongly depended on the layout design. Using a 0.75 NA ArF Scanner, CLM showed NILS reduction by about 10% in the presence of lens aberration and flare, which reduced DoF margin by about 0.1~0.2μm depending on the layer. So the critical layers in sub 100 nm node DRAM satisfied 10% of EL (Exposure Latitude) and 0.1 μm of DoF (Depth of Focus) margin. Also 3D mask topographic effect of CLM in the specific layer was discussed.
Process windows, MEEF (Mask Error Enhancement Factor), flare, aberration effect of the CLM (Cr-less PSM) were measured by the simulations and experiments for the various DRAM cell patterns compared with 6% transmittance HTPSM in the ArF lithography. We designed CLM layouts of sub 100nm node DRAM cells concerning the mask manufacturability, maximizing the NILS (Normalized Image Log Slope) and minimizing the MEEF with a semi-automatic OPC tool. Isolation, line and space and various contact patterns showed increasing process windows compared with HTPSM and this strongly depended on the layout design. Using 0.75 NA ArF Scanner, CLM showed NILS reduction by about 10% in the presence of lens aberration and flare, which reduced DoF margin by about 0.1~0.2 μm depending on the layer. So the critical layers in sub 100 nm node DRAM satisified 10% of EL (Exposure Latitude) and 0.4 μm of DoF (Depth of Focus) margin.
Pattern displacement error under off axis illumination was evaluated by using an electrical critical dimension measurement method at various pitches. Two major phenomena were observed which should be considered in order to control overlay accuracy between layers. One is the difference of pattern displacements between sub-micron device level patterns and large micron optical overlay measurements patterns, which is correctable by making correction tables between the layers. The other is pattern displacement error distribution error distribution within a field, which is not correctable and limits the usage of the field size and pattern pitches for minimal overlay control. The latter is more important and should be investigated in detail for systems with given pitch sizes before the devices are integrated.