As the feature size decreases to 90nm and 65nm, the role of phase shift mask as a RET method becomes more and more important. Although alternating PSM has been one of the possible methods to improve the resolution, however, the difficulty of mask manufacturing prevent us from adopting the technology. One of the main issues is microloading effect including RIE lag, pattern density effect that cause especially the imbalance of phase shifting due to the etch depth difference in the patterns with different CD size and different pitch as the feature size downs to subhalf micron. This leads to the space CD difference with the DOF variation in the wafer image.
In this paper, characteristics of RIE lag and other phenomenon were evaluated with the DOE method that included such parameters: source power, bias power and pressure. Etch depth difference was confirmed with AFM measurement and calculated to phase shift angle. Results were analyzed with statistical method and major effects and interaction effects were found.
To improve the resolution and fidelity of the small size patterns as device nodes less than 0.18micrometers , mask makers is required to apply dry etch process. But with applying this process we would experience some problems which aren't happened on wet etching process like small-circled chrome defects, CD Mean to Target variation according to Clear Field Ratio and so on. Of all these barriers this paper is willing to handle with the desired CD Mean to Target control against Clear Field Ratio. In not only mask making but wafers the CD control is one of the most important factors to get good devices. With understanding of CD variation on Clean Field Ratio on each layers it can help for us to estimate macro loading effect and improve CD MTT by adjusting dose accurately or the desired develop recipes before dry etching application for high-end devices.
In low k1 lithography, reticle quality decides the process capability. Therefore, we must minimize CD errors on the reticle plate. Double Step process (DS process) is a unique method to improve CD uniformity of line patterns on the active region of poly layer reticle. In DS process, poly layer design is divided into the active region and the non-active region. And then, these two regions are processed individually. By using this procedure, pattern density variation across the reticle plate is reduced when making line patterns on the active region. As a result, the loading effect of the dry etching process reduced, and CD uniformity of these patterns can be improved. Using this technique of reticle fabrication, CD uniformity could be improved. Particularly, the range of CD variation of line patterns in logic cells was drastically reduced from 29nm to 20nm.