As the leading edge semiconductor technology development, the gate critical dimension (CD) shrinks below
90nm. The microlithography capability is limited by the exposure utility. The development of scanner is
focusing on low k that is implying that the high NA scanner is the main stream in the future. In addition, the
high NA reticle requirement is stricter than previous one. In aspect of mask manufacturing, reducing mask
topography effect is one of the various solutions, which is like lower mask blank flatness, should be lower than
1T flatness type or else. Unless the mask flatness, the absorber profile also could be a considerate effect element,
which is local topography effect contribution in wafer print window.
The main purpose of this study is verifying how much wafer prints window discrepancy between different
absorber profiles. The experiment pattern is designed for five kind of MoSi sidewall angle (SWA) on the same
mask, which could simultaneously gathers the wafer print window data. In addition, the other purpose is getting
exactly the same process condition of five kinds MoSi profile in both mask house and lithography of wafer
manufacturing Fab. The mask layout pattern is poly layer of logical 90 nm generation that is more critical among
all of lithography and was exposed by 193nm ArF.Then, we offer the effected level between absorber profile
and lithography process window. The process window of different SWA pattern will be compare to check the
relationship between process windows and mask profile. We also investigate how the profile affects the optical
proximity behavior.
Photomask blank flatness is more important for wafer lithography so far. In view of economic and capital concern, venders of mask blank always provide several level flatness of blank what mask house request. And the wafer fabricators would request the flatter photomask to fit the next generation requirement. The topography effect of photomask should be a contribution of lithography process window. The effect includes quartz substrate flatness and distortion and the film of Cr and MoSi deposit. Besides, the Mask blanks have several shapes that are flat, concave and convex. Reducing the effect from mask is the main consideration of depth of focus improvement. In this study, we made two masks of different type, 0.5T and 2.5T. Flatness measurement is directly provided by interferometer. To verify the effect between mask blank flatness and wafer printing window. Furthermore, we also check patterned mask effect of flatness. The pattern we use is poly layer of logical 90 nm generation that is more critical among all of lithography process and was exposed by 193nm ArF environment. Primary purpose of the ADI (after develop inspection) performance concern is process window of wafer print. Then, we offer the effected level between mask blank flatness and lithography process window.
Chrome-less Phase Lithography (CPL) was introduced as a potential strong Resolution Enhancement Technology (RET) for 90nm to 65nm node critical layers. One of the important issue with trench type chrome-less mask manufacturing for post structure is quartz defect detection capability. This study will focus on half pitch 80nm (1X) design node and apply different trench sizes and programmed defect sizes. All test patterns will be inspected on KLA-Tencor TeraScan576 inspection tool with both standard Die-to-Die (DD) and TeraPhase DD inspection modes to determine defect detection capability. All programmed defects will also be simulated on the Zeiss AIMS Fab-193 to determine wafer CD error. Finally, we will establish the relationship between trench size, defect detection capability and printability, and summarize the chrome-less mask quartz defect detection capability for 80nm post structure application.
CPL technology is one of the powerful methods for Resolution Enhancement Technology. With high NA and strong off-axis illumination CPL has a very high resolution and is capable of printing complex 2D patterns. Image using off-axis illumination with an attenuated phase shift mask can also improve process latitude. We can combine two technologies in one mask with same off-axis illumination condition to have more flexible application. Normally CPL technology is applied in binary mask and Qz is etched for 180 degree phase. To fulfill this hybrid mask we can apply Qz etch in current normal attenuate PSM blank and E-Beam 2nd writing is also can be applied for the zebra structure. To form the different application in different area we use 5 times writing in this hybrid mask process. Also the Qz etching process is very important because the Qz etching is strongly related to the Cr-Mosi-Qz three layer profile. So a L9 DOE has been applied for Qz etching parameter fine tuning. We will optimize the phase uniformity, phase linearity, profile, CD linearity and CD proximity through the DOE.
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