This paper discusses the current status of self supporting precision membrane optical shell technology (MOST) apertures based on thin (25 to 125 um thick) polyimide and polyester films primary shell. Optically relevant doubly curved reflective apertures are realized by inducing permanent curvature into thin substrates that can then be coated. The initial thin nature provides both very low areal density (20 to 200 grams/m2) and compatibility with compact roll stowage. The induced curvature/depth provides the ability to support the shell around the periphery at discrete locations and considerable structural and dynamic stiffness. The discrete mounts also provide an excellent location with which to improve the surface figure and to reject environmental and host structure induced errors. Material microroughness on the leading substrate/coating combination has been measured to down to 3 nm rms over small (100x100um's) sample sizes with white light interferometry. A variety of reflective coated substrates have also been shown to have sub micron rms surface roughness over up to 100mm diameter test apertures using interferometric measurements. Best materials currently have 20nm rms surface roughness noise floors at these sizes. The ability to fabricate shells over a range of prescriptions (R/0.9 to R/2.2) and a range of sizes (0.1 to 0.75m diameter) has been demonstrated. Global surface figure accuracies of 2 to 4 microns rms have been demonstrated at the 0.2m size, and further improvements are anticipated through ongoing improved fabrication techniques (preliminary results indicate sub-micron rms values). The ability of discrete boundary control to improve the shape and maintain it in the face of disturbances (gravity for example) is demonstrated as is the ability to implement high amplitude (multi-wave) Zernike mode surface figure control. Results extending boundary control to interferometric optical level are also presented.
A hexapod capable of precision positioning is described. The differences between serial and parallel motion control are presented, and the potential advantages of parallel systems realized as hexapods are highlighted. Actuation options for positioning hexapods are considered in light of a requirement for a high ratio of range to resolution and a need for zero power hold. For positioning of smaller payloads, piezoelectric-based step-and-repeat actuation becomes attractive. The merits of existing and new piezoelectric step-and-repeat actuators are evaluated. A point-and-hold hexapod designated PH1, and its performance, is described, along with several areas identified for possible design improvement. This motivates the development of advanced struts using similar actuation technology. Test results are presented, and a new hexapod, the PH2, is described. This system includes encoder-based feedback control of leg lengths, and a complete software-based user interface and control system. Hexapod test results and performance measurements are presented, and planned future enhancements are described.
Architectural studies have identified field-programmable gate arrays (FPGA) as a class of general-purpose very large scale integration components that could benefit from the introduction at the logic level of state-of-the-art massively parallel optical inter-chip interconnections. In this paper, we present a small-scale optoelectronic multi-FPGA demonstrator in which three optoelectronic enhanced FPGAs are interconnected by 2D Plastic Optical Fiber (POF) ribbon arrays. The full-custom FPGA chips consisting of an 8 X 8 array of very simple programmable logic cells are equipped with two optical sources and two receivers per FPGA cell yielding a maximum of 256 optical links per chip. The optical links are designed for signaling rates of 80 to 100 Mbit/s (160 to 200 Mbaud using Manchester coded data) compatible with the maximum clock frequency of the, in 0.6 micrometers CMOS implemented, FPGA chips. The results of parallel link experiments between such modules with both VCSELs and LEDs as sources will be shown. A large scale parallel bit error rate experiment at 90 Mbit/s/channel between two half-populated VCSEL-based FPGA modules with 112 of their 128 channels operational at bit error rates below 10-13 on all active channels (approximately equals 10 Gbit/s/chip) proves the feasibility of this approach. We first briefly discuss the general architecture and the realization of the optoelectronic FPGA demonstrator system. We then present measurement results on the available modules, followed by some conclusions on this work.
It is our goal to demonstrate the viability of massively parallel optical interconnections between electronic VLSI chips. This is done through the development of the technology necessary for the realization of such interconnections, and the definition of a systems architecture in which these interconnections play a meaningful role. Field-programmable gate arrays (FPGA) have been identified as a class of general-purpose very large scale integration components that could benefit from the massive introduction of state-of-the-art optical inter-chip interconnections at the logic level. In this paper, we present the realization of a small-scale optoelectronic FPGA with 8 X 8 logic cells, containing two optical sources and two receivers per FPGA cell yielding a total of 256 links per chip. These FPGA chips designed to operate with information rates of 80 Mbit/s/link will be used in a three- chip demonstrator system as a test bed for the concepts above. We first identify the reason why we think optical interconnects can provide added value in FPGAs. The next sections briefly discuss the general architecture of our demonstrator system and the realization of the optoelectronic FPGA. We then present first measurement results followed by ongoing work and conclusions.