KEYWORDS: Super resolution, Video, Field programmable gate arrays, Control systems, Computer programming, Computer simulations, Telecommunications, Video compression, Multimedia, Standards development
In this paper we present a novel methodology to accelerate an MPEG-4 video decoder using software/hardware co-design
for wireless DAB/DMB networks. Software support includes the services provided by the embedded kernel
&mgr;C/OS-II, and the application tasks mapped to software. Hardware support includes several custom co-processors and a
communication architecture with bridges to the main system bus and with a dual port SRAM. Synchronization among
tasks is achieved at two levels, by a hardware protocol and by kernel level scheduling services. Our reference application
is an MPEG-4 video decoder composed of several software functions and written using a special C++ library named
CASSE. Profiling and space exploration techniques were used previously over the Advanced Simple Profile (ASP)
MPEG-4 decoder to determinate the best HW/SW partition developed here. This research is part of the ARTEMI project
and its main goal is the establishment of methodologies for the design of real-time complex digital systems using
Programmable Logic Devices with embedded microprocessors as target technology and the design of multimedia systems for broadcasting networks as reference application.
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