In resolution limited lithography process, the image deformation is getting severer. This is very important area where
we need to fully understand and improved since the image deformation is directly giving poor CD control effect.
Especially, contact hole image will be more sensitive since it has lower k1 factor that line and spaced pattern. This image
deformation of contact hole can give some severe electrical fail due to not opened contact. In our case, we observed
some critical failure mode of diagonal induced by abnormal contact hole shape of rough edge.
In this paper, we investigate how deformed contact hole image impacted on degradation of device performance in
electrical properties and yield and how we can improve it. To quantitatively analyze image deformation of contact hole,
we recommend new measurement method first. This new measurement gives exact image deformation amount at
different experimental conditions.
Finally, we will show how experimental conditions such as soft bake temperature, post expose bake temperature,
hardening bake temperature, illumination condition and mask bias change image deformation of contact hole.
The continuous shrinkage of critical dimensions has driven ArF lithography to resolve very small features and ever
thinner resist films to prevent pattern collapse. Also importance of hardmask technology is becoming increasingly
evident as the demand for both the critical dimension control and sufficient thickness of etch mask.
We have developed a silicon based hardmask prepared by plasma-enhanced chemical vapor deposition (PECVD) to
match organic anti-reflective coating (ARC). The ordinary single dielectric ARC or organic ARC is very sensitivity to the
substrate topology. Dual ARC (dielectric ARC + organic ARC) perform a less CD variation than single ARC. In addition,
this material can serve as an effective hardmask etch barrier during the plasma etch.
The most advantage of Dual ARC is that we have good critical dimension uniformity (CDU) regardless of substrate
The advanced lithography needs to be tightly controlled in various areas of lithography. The mask CD specification is one of new areas required much tighter control. Typically, mask CD error can be sorted as two different categories. One is Mean-to-target (MTT) and another is CD uniformity (CDU). The MTT is the difference between the target value and the average value of the measured CD on the mask. CDU means CD uniformity across mask. Those two potential errors can be magnified on the wafer level due to the MEEF. To overcome the MTT, we can adjust expose dose to compensate mask CD error so that we achieve targeted CD on the wafer level. However, the changing expose dose also induces process window change due to the MEEF. It means that we have narrower process window even if we get the targeted CD on the wafer level. On the other hand, CDU can give two different effects on the wafer level. One is narrower process window due to magnified ACLV (Across Chip Line-width Variation) due to the MEEF. Another effect of CDU is the poor OPC accuracy caused by different MEEF as function of pitch. For example, we assume that CD difference of dense line and isolated line is 10 nm on the mask. However, on the wafer, this 10 nm can be magnified as 20 nm by MEEF difference between two structures. Therefore, we think that the mask specification needs to take account those effects. In this paper, we will show technical data to prove how MTT and CDU impact on process window and OPC accuracy. And we will show how we have to make mask specification to overcome those effects.
As design rule is decreased, OPC accuracy has become the crucial factor for achieving stable device functionality and yield. Usually the lithography and the etching process conditions are main parameters impacting to the OPC accuracy. The OPC accuracy can be changed as function of process conditions, even if we use same OPC model. And we usually expect to obtain same OPC results between different devices in same technology node if we used same OPC model and process. But we observed different OPC results as function of devices as well as process conditions. We suspected this phenomenon was resulted from the different pattern density induced global etch bias variation. First of all, we will prove that the device dependency of OPC accuracy is come from pattern density induced etch bias effect. Finally, we will setup new OPC methodology to compensate this effect.