An integrated circuit combining imprinted, nanoscale crossbar switches with metal-oxide field effect transistors
(MOSFET) was fabricated and tested. Construction of the circuits began with fabrication of n-channel MOSFET
devices on silicon-on-insulator (SOI) substrates using CMOS compatible process techniques. To protect the FET devices
as well as provide a flat surface for subsequent nanoimprint lithography, passivation and planarization layers were
deposited. Crossbar junctions were then fabricated next to the FETs using imprint lithography to first define arrays of
parallel nanowires over which, a switchable material layer was deposited. This was followed by a second imprint proces
to construct another set of parallel wires on top of, and orthogonal to the first, to complete the nano-crossbar array with a
half pitch (hp) of 50 nm. The switchable crossbar devices were then connected to the gate of the FETs and the resulting
integrated circuit was tested using the FET as the output signal follower. This successful fabrication process serves as a
proof-of-principle demonstration and a platform for advanced CMOS/nanoscale crossbar hybrid logic circuits.
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