Currently, there are many developments in the field of EUV lithography that are helping to move it towards increased HVM feasibility. Targeted improvements in hardware design for advanced lithography are of interest to our group specifically for metrics such as CD uniformity, LWR, and defect density. Of course, our work is focused on EUV process steps that are specifically affected by litho track performance, and consequently, can be improved by litho track design improvement and optimization. In this study we are building on our experience to provide continual improvement for LWR, CDU, and Defects as applied to a standard EUV process by employing novel hardware solutions on our SOKUDO DUO coat develop track system. Although it is preferable to achieve such improvements post-etch process we feel, as many do, that improvements after patterning are a precursor to improvements after etching. We hereby present our work utilizing the SOKUDO DUO coat develop track system with an ASML NXE:3300 in the IMEC (Leuven, Belgium) cleanroom environment to improve aggressive dense L/S patterns.
PS-b-PMMA block copolymer is a well-known DSA material, and there are many DSA patterning methods that make effective the use of such 1st generation materials. Consequently, this variety of patterning methods opens a wide array of possibilities for DSA application[1-4]. Last year, during the inaugural International DSA Symposium, researchers and lithographers concurred on common key issues for DSA patterning methods such as: defect density, LWR, placement error, etc. Defect density was specifically expressed as the biggest obstacle for new processes. Coat-Develop track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performances. In this study, defectivity was investigated using an atmosphere-controlled chamber on the SOKUDO DUO track. As an initial step for expanding the DSA process window, fingerprint patterns were used for various atmospheric conditions during DSA self-assembly annealing. In this study, we will demonstrate an improved DSA process window, and then we will discuss the mechanism for this atmospheric effect.
Directed Self-Assembly (DSA) is a well-known candidate for next generation sub-15nm half-pitch lithography. [1-2] DSA processes on 300mm wafers have been demonstrated for several years, and have given a strong impression due to finer pattern results. [3-4] On t he other hand, specific issues with DSA processes have begun to be clear as a result of these recent challenges. [5-6] Pattern placement error, which means the pattern shift after DSA fabrication, is recognized as one of these typical issues. Coat-Develop Track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performance. In this study, the placement error was investigated using a simple contact-hole pattern and subsequent contact-hole shrink process implemented on the SOKUDO DUO track. Thus, we will show the placement error of contact-hole shrink using a DSA process and discuss the difference between DSA and other shrink methods.
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure sub-30nm halfpitch lithography. Furthermore, high-NA EUV exposure tool(s) released two years ago gave a strong impression by finer pattern results. On the other hand, it seems that the coat-develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice a 26-32nm pitch patterning coat develop track process also has challenges with EUV resists. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in the track process have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR), and so on.[2-8] The coat-develop track process has evolved along with novel materials and metrology capability. Line width roughness (LWR) control and defect reduction are demonstrated utilizing the SOKUDO DUO coat-develop track system with ASML NXE:3100 and NXE:3300 exposures in the IMEC (Leuven, Belgium) cleanroom environment. Additionally, we will show the latest lithographic results obtained by novel processing approaches in the EUV coat develop track system.
Spin coating has been used as a photoresist application method for many years, and consequently certain defects have been recognized through each resist generation; i-line, KrF, ArF, ArF immersion and, most recently, EUV. Last year we reported an in-situ analysis via high-speed video camera that proved to be useful for understanding defect formation such as non-uniformity spots within organic film coatings and post-develop water-mark defects. In this study, fingerprints known as ‘tiger stripes’ around the wafer’s edge were analyzed. This phenomenon, for example, is directly related to the wafer spin-speed and air-flow during the coat-processing.
Utilizing a high-speed camera and 3D simulation, we reveal the mechanism of fingerprint generation for tiger stripe phenomena, confirm the mechanism with several different spin-speeds, and correlate these to defect inspection results. Furthermore, we will discuss the expansion to 450mmm wafers.
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure sub-30nm half-pitch lithography. Furthermore, a high-NA EUV exposure tool released two years ago gave a strong impression for finer pattern results. On one hand, it seems that the coat develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice the 26-32nm pitch patterning coat-develop track process also has challenges with EUV resist. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in the track process have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR) and so on.[2-6] The coat-develop track process has evolved along with novel materials and metrology capability improvements. Line width roughness (LWR) and defect control are demonstrated utilizing the SOKUDO DUO coat-develop track system with an ASML NXE:3100 in the IMEC (Leuven, Belgium) clean room environment. Additionally, we will show the latest lithographic results obtained by novel processing approaches in an EUV coat-develop track system.
EUV lithography (EUVL) is well known to be a strong candidate for next generation, single exposure, sub-30nm half-pitch lithography. Much progress relevant to EUVL has been reported for a decade, however, many issues continue to challenge implementation for volume production.[1,2] On the other hand, it seems that the coat develop track process remains very similar and in many aspects returns to KrF or ArF dry process fundamentals, but in practice 26-32nm pitch patterning coat develop track process also has challenges with EUV resist. As access to EUV lithography exposures has become more readily available over the last five (5) years, several challenges and accomplishments in track processing have been reported, such as the improvement of ultra-thin film coating, CD uniformity, defectivity, line width roughness (LWR), and so on.[3,4,5,6] The coat-develop track process has evolved along with novel materials and metrology capability improvements. By coating ultra-thin under layers and resist films and by controlling resist dissolution, the SOKUDO DUO coat develop track system at IMEC (Leuven, Belgium), with ASML NXE3100 exposure, has been used to demonstrate improved CD uniformity, LWR, and defect control. Additionally, we will show the latest lithographic results obtained by novel processing approaches in EUV coat develop track system.
Typical defects to be resolved during coat-develop track processing have been confirmed during each resist generation; I-line, KrF, ArF, ArF immersion, and recently EUVV.[1-5] In this study, two types of defect formation were analyzed: organic film post coating non-uniformity spots and post develop water-marks. During substrate rotation,, a high-speed video camera is used to observe characteristic phenomena which lead to the generation of these rather typical defects. Post coating non-uniformity defects were linked to bubble formation, and post develop defects were associated with thee wafer drying conditions. By correlating high-speed camera images and defect inspection results from several different resists we can disclose the defect generation mechanism of multiple typical phenomena.
EUV lithography (EUVL) is the leading candidate for the manufacture of devices with 1× nm node and beyond.
However, many challenges remain for the industry to understand clearly and to overcome before EUVL will be ready for
application in volume production. Efforts have been made to improve the various critical components of EUVL, such as
light source, exposure tool, mask, resist material, and so on.[1,2] Among these, resist materials are considered as one of the most critical issues in realizing EUVL.[3,4] Coat-develop track system overcame several challenges for each traditional resist system (i.e. i-line, KrF ArF, and ArF immersion). EUV resist system requires ultra thin organic film coating. The under-layer thickness is below 10nm and the resist thickness is about 40nm, however, in some cases film thickness is smaller than the diameter of particles on the substrate, even if the particle size is smaller than the detection limit of defect inspection tool. Also EUV resist patterning becomes extremely small pattern pitch. It leads the difficulty of CD control because the resist solubility in develop processing depends on resist type. Some resists were significantly swelled during develop process. Swelling depends on develop time and developer materials. That behavior on EUV resist system is becoming evident. Furthermore, LWR
improvement on track processing is required. During the conference, we will discuss how to coat the substrate with ultra thin film and how to control resist dissolution to improve CD uniformity and LWR. Additionally, we will show the latest lithographic results obtained with the novel application for EUV coat-develop track system.
A baseline coat-develop track process has been established for inorganic EUV resists. Inorganic EUV resists have
already been highlighted for their higher resolution and lower Line-Width-Roughness (LWR) for lithography features as
well as strong etch resistance , , , . This inorganic resist system is not only interesting due to lithography
process capability but also do to its influences on coat-develop track processing. It is understood that this inorganic resist
system is dissolved in an aqueous solution and therefore has the different characteristics compared to typical polymer
photoresist in organic solvent.
Spin coating this aqueous resist solution leads to several challenges beyond the traditional aqueous Top Anti-Reflective
Coat (TARC) materials used decades ago. Resist spin coating systems have continuously improved over the years based
on polymer photoresists, therefore it becomes necessary to confirm if the latest coat module design and processes are
equally applicable to aqueous resists targeted for EUV lithography. Another characteristic of this inorganic system it is
not a chemical amplified resist. Post-Applied Bake (PAB), Post-Exposure Bake (PEB) and develop processes are
compared with current polymer photoresist process. In this study, a coat-develop track process baseline is established for
metrics such as film thickness uniformity, critical dimension (CD) uniformity and process defectivity. Based on this
baseline data areas for improvement in coat-develop track process are identified to enable inorganic resist transition to
volume production with EUV or E-Beam lithography.
The reduction of line width roughness (LWR) remains a difficult issue for very fine patterns obtained with extreme
ultraviolet (EUV) lithography. Thus, the investigation of LWR-reduction from the viewpoint of resist processing has
become necessary. Alternative bake processes, such as the flash-lamp (FL) has been proven feasible as for application
in EUV resists. This work focuses on initial investigations for its use in post-development bake (post bake or PB). A
polyhydroxystyrene-acryl hybrid EUV model resist was utilized and comparisons with 'no bake' and conventional
hot-plate PB conditions were made. As a result, relatively improved LWR was obtained with FL PB with minimal
effect on lithographic performance. Moreover, in the course of these experiments, two types of resist reflow
mechanisms assumed to be the primary basis for the LWR improvement achieved, are discussed.
This paper summarizes the development of EUV molecular resists based on fullerene derivatives: the lithographic
evaluation results of EUV resists using a small-field exposure tool (SFET). Moreover this is the first report on the
application of fullerene-based molecular resists to half-pitch (hp) 3x-nm test device fabrication using a full-field
step-and-scan exposure tool (EUV1).
Non-conventional chemically amplified (CA) negative resist for EUV lithography was studied. We have
designed negative-tone EUV resist based on thiol-yne stepwise radical reactions. OH groups of
poly(4-hydroxystyrene) (PHS) were modified with functional units bearing C-C triple bond structure. Resist was
formulated as a mixture of modified-PHS, multifunctional thiol compound, and photoradical generator. The
present resist was developable with standard 2.38 wt% TMAH aq. solution. Photo-sensitivity of the resist was
obtained on irradiation at 254 nm and 13.5 nm. The resist was highly sensitive to EUV exposure. The sensitivity
and the contrast were affected by the structure of modified-PHS and process conditions.
This study reports on post-develop defect for EUV resist process. Presently, research and development of EUV resists
are continuously being carried out in terms of resolution, sensitivity, LWR. However, in the preparation of EUV
lithography for mass-production, research on the reduction of pattern defects, especially post-develop defect is also
necessary. As observed during the early stages of resist development for the various lithographic technologies, a large
number of pattern defects are commonly coming from the resist dissolution process.
As previously reported, utilizing an EUV exposure tool, we have classified several EUV specific defects on exposed and
un-exposed area. And also we have reported approaches of defect reduction.
In this work, using some types developer solution (TBAH, TBAH+, etc) comparing with current developer solution
(TMAH), EUV specific defects were evaluated. Furthermore, we investigated the defect appearing-mechanism and
approached defect reduction by track process. Finally, based on these results, the direction of defect reduction
approaches applicable for EUV resist processing was discussed.
The reduction of linewidth roughness (LWR) is considered one of the most critical issues in extreme ultraviolet (EUV)
photoresists. A possible solution to the LWR issue is shortening the acid-diffusion length of the photoacid via the
optimized application of post-exposure bake (PEB) processes. In this study, the development and feasibility of the
flash-lamp (FL) PEB process as a replacement for the commonly used hot-plate PEB process is investigated. The
results indicate that, using the FL PEB process, the acid-diffusion length is controllable and lithographic patterning
results are obtained. Further detailed analysis is necessary to optimize this technology for lithographic patterning
applications. However, the present results show the potential of FL PEB for applications in EUV photoresist
The Selete R&D program evaluates the feasibility of the Extreme ultraviolet (EUV) lithography process for
manufacturing semiconductor devices. We therefore conducted a yield analysis of hp-2x-nm test chips by using the
EUV1 (Nikon) full-field exposure tool. However, the resist performance did not comply with the stringent requirements
of ultimate resolution, sensitivity, and line-width roughness.
We subsequently reported two new Selete standard resists (SSRs), i.e., SSR6 and SSR7. SSR6 is the polymer
resist used in hp-2x-nm test chip evaluation in which an ultimate resolution of 22 nm line-and-space (L/S) pattern was
achieved. SSR7 is the first molecular resist that was evaluated for feasibility at Selete. SSR7 is a fullerene based resist
with strong etching durability. By using this resist, an ultimate resolution of 24 nm L/S pattern was achieved.
We have also evaluated resist processing by using SSRs for hp-2x-nm test chip evaluation. An ultrathin
underlayer was evaluated for the improvement of pattern transferability. This optimized ultrathin underlayer was coated
on the test chip substrate that was devoid of nano-sized-pinholes, and a fine pattern was observed on this ultrathin
underlayer. In the evaluation of the development process, SSRs were evaluated with tetramethylammonium hydroxide
(TMAH) and tetrabutylammonium hydroxide (TBAH) developer solutions. In summary, it was clear that the lithographic
performance improvement varies depending on the type of polymer resist used with a particular developer solution.
Furthermore, a significant improvement in the prevention of pattern collapse was demonstrated using a combination of
the TBAH developer solution and alternative rinse solutions.
Non-conventional chemically amplified (CA) resist was designed. Photo-induced thiol/ene radical reaction
was used to insolubilize the resist based on multifunctional thiol and poly(4-hydroxystyrene) (PHS) derivatives.
Hydroxy groups of PHS were modified with allyl or propargyl moiety. Dissolution property of the
modified-PHS in TMAHaq solution was affected by the modification degree. Resist was prepared by mixing
the modified-PHS, multifunctional thiol compound, and photoradical generator. Photosensitivity of the resist
was studied at 254 and 13.5 nm. The sensitivity was strongly affected by the modification degree of PHS,
molecular weight of PHS, molecular weight distribution of PHS, amounts of thiol compound and photoradical generator added. It was found that the present resist system was highly sensitive to EUV exposure.
This paper summarizes the development of EUV resists based on various new materials: the lithographic evaluation results of EUV resists from resist material manufacturers using the small field exposure tool (SFET). We discuss the screening results of new resin materials based on
calixresorcinarene, "Noria" and fullerene.
This is the study report about post-develop defect on EUV resist. The resolution, sensitivity, LWR, etc. of EUV resist
have been currently studied in the development phase. We have acknowledged that resist generates a lot of defects in its
transition from i-line, KrF, ArF and immersion-ArF. However, those were just a couple of defect types in the transition,
and they were eliminated through resist improvement.
In this study, we confirmed EUV defect type using EUV exposure tool. We also evaluate defect generation using tetrabutyl-
ammonium-hydroxide (TBAH) developer. We finally discuss on the difference of defect between using KrF and
EUV exposure tool, furthermore difference of defect between using TMAH and TBAH developer.
The main development issue for EUV resists is how to concurrently achieve high sensitivity, resolution below 22-nm
half-pitch (hp), and low line width roughness (LWR) in the required fine patterns. Sensitivity and resolution continue
to be improved through advances in EUV resist material research. However, through the material-approach, LWR
remains a difficult issue. Thus, LWR-reduction from the point of view of alternative resist processes was investigated.
As a result, LWR improvement was obtained utilizing alternative developer and rinse solutions. However, a difference
in the LWR-reduction effect of these processes depending on the type of resist material used was observed.
Extreme ultraviolet (EUV) lithography is the leading candidate for the manufacture of semiconductor devices at the hp-
22-nm technology node and beyond. The Selete program covers the evaluation of manufacturability for the EUV
lithography process. So, we have begun a yield analysis of hp-2x-nm test chips using the EUV1 full-field exposure tool.
However, the resist performance does not yet meet the stringent requirements for resolution limit, sensitivity, and line
edge roughness. We reported on Selete standard resist 4 (SSR4) at the EUVL Symposium in 2009. Although it has better
lithographic performance than SSR3 does, pattern collapse limits the resolution to hp 28 nm. To improve the resolution,
we need to optimize the process so as to prevent pattern collapse. An evaluation of SSR4 for the hp-2x-nm generation
revealed that a thinner resist and the use of a TBAH solution for the developer were effective in mitigating this problem.
Furthermore, the use of an underlayer and an alternative rinse solution increased the exposure latitude by preventing
pattern collapse when the resist is overexposed. These optimizations improved the resolution limit to hp 22 nm.
Non-chemically amplified (CA) negative resist for EUV lithography was studied. Photo-induced thiol/ene
radical reaction was used to insolubilize the resist based on poly(4-hydroxystyrene) (PHS) derivatives.
Hydroxy groups of PHS were modified with allyl, norbornen, or methacrylate moiety. Dissolution property of
the modified-PHS in TMAHaq solution was studied. The degree of the modification of PHS strongly affected
the solubility in TMAHaq. Resist was a mixture of modified-PHS, multifunctional thiol compound, and
photo-radical generator. Photo-sensitivity of the resist was studied at 254 nm and 13.5 nm. The sensitivity
was affected the concentration of thiol compound added. It was found that the present resist system was highly
sensitive (5~6 mJ/cm2) to EUV exposure.
This paper summarizes the development of EUV resists at Semiconductor Leading Edge Technologies (Selete): the
benchmarking results of more than 160 EUV resists from resist manufacturers using the small field exposure tool
(SFET) and the selection of the Selete standard resists (SSR) for the SFET. We discuss the current status of EUV
resist performance compared to the targets for 32-nm half-pitches (hp) concerning resist sensitivity, ultimate
resolution, and line-width-roughness (LWR). In addition we show the screening results of new resin materials.
In extreme ultraviolet (EUV) lithography, exposures are and can only be performed in vacuum (<1x10-5 Pa). At
present though, conventional resist processing technologies before and after exposure (coating, post application bake,
post exposure bake, etc.) are performed in atmospheric pressures. Investigations on the possibility of a
EUV-specialized resist processing system; specifically, the development of a 300mm wafer compatible, vacuum-based
resist baking and cooling system is presented. Comparative evaluations with conventional atmospheric-based systems
were made from the viewpoint of resist lithographic performance (sensitivity, resolution, line width roughness) and
resist outgassing rate. As a result, an improvement in LWR was also observed in vacuum post application bake and
post exposure bake. However, a difference in resist lithographic performance depending on the type of resist material
used was observed between resist processes performed in-atmosphere and in-vacuum. Lastly, the vacuum based bake
process was found to have no significant effect on resist outgassing rate released.
The main challenge facing the implementation of EUV resist and processing has been concurrent achievement of high
sensitivity, high resolution, and low line width roughness (LWR). In order to improve the performance of EUV resist,
Selete is actively pursuing its benchmarking. The results from this benchmarking were found to be as follows: Esize
improved with the increasing capability of EUV pattern exposure. Sensitivity improved during this year. Resolution is
found to be almost sufficient for 32-nm half-pitch (hp), but not quite good enough for 22-nm hp. Resist blur of the resist,
which marked good score in benchmarking, is found to be 10nm to 11nm. LWR is still far from its target value.
Two types of EUV resists based on poly(4-hyrdoxystyrene) (PHS) were designed, i.e., PHS-bound sensitizer (PHS-FISS)
and PHS/sensitizer blend (PHS/FITS). Imino sulfonate compounds were used as a photosensitizer. A PHS-bound
sensitizer resist was prepared by the conventional radical copolymerization of 4-(tertbutyldimethylsilyl)oxystyrene
(MSOST) and 9-fluorenilideneimino p-styrenesulfonate (FISS) and subsequent de-silylation of the copolymer. PHS
with low molecular weight distribution was obtained by the anionic polymerization of MSOST and followed by
de-silylation of the polymer. It was found that both types of resist were negative type and highly sensitive ( 10-20
mJ/cm2 ) on exposure at 254 nm and 13.5 nm. In the case of blended resist, the sensitivity was dependent on the
amounts of sensitizer added and molecular weight of PHS. Outgassing from the present resists on EUV exposure was
lower than that observed for MET-2D resist.
The main development issue regarding EUV resist has been how to concurrently achieve high sensitivity, high resolution, and low line width roughness (LWR). This paper describes the current status of EUV resist development at Selete with a small field exposure tool (SFET). Selete standard resist 2 (SSR2) can simultaneously resolve 26-nm dense and isolated lines with the SFET. Our top data for resolution with annular illumination shows a 25-nm half-pitch. In evaluating resist performance, resist blur should be estimated separately from exposure tool fluctuations. By considering the aberration, flare, and actual illumination shape, resist blur can be estimated more accurately. We estimate the resist blur for SSR2 to be between 9.5 and 10.4 nm as sigma of the Gaussian convolution. We also present benchmarking results for suppliers' samples. Though sensitivity has been improved somewhat in some resists, further improvement is necessary. Further reduction of LWR is especially needed.
Surface roughness of molecular and polymer resists were probed with an atomic force microscope (AFM) and analyzed
using the power spectrum density (PSD) function. The PSD curve obtained from AFM image of the molecular resist
showed a broad profile dependent on the exposure dose and small roughness. The PSD increased more in the low spatial
frequency range after the exposure and the correlation length was increased. Meanwhile, the PSD of the polymer resist
showed a narrow profile with respect to the dose and large roughness. Overall increase in PSD with respect to the spatial
frequency was observed after the exposure.
Traditionally, the stable-state temperature uniformity of resist post-exposure bake (PEB) units is considered major contributor to within wafer critical dimension (CD) uniformity. However, it has been realized that continued improvements in CD uniformity requires across-the-wafer temperature uniformity for the entire PEB cycle. The wafer temperature uniformity of the PEB heating and chilling cycle contribution to CD uniformity has been characterized in detail. When a silicon wafer is first placed on a traditional hot plate the within wafer temperature variance can be several degrees Celsius before the wafer reaches equilibrium at the set-point temperature target. A completely new hot plate design has been conceptualized and produced to attain thermal uniformity of the process wafer for the entire PEB cycle. This new PEB hot plate design was modeled after thermal transfer principle of a heat pipe to attain across-the-wafer uniformity during wafer heating and stable-state PEB. The new PEB plate design also allows to quickly change the PEB process temperature set-point up or down. Characterization has been completed to detail the importance of this new PEB plate design in attaining within wafer CD uniformity on single-digit nanometer level for KrF and ArF photolithography resist processing on track equipment.