Mr. Laurent Le Cam Profile

Laurent Le Cam

Product Manager/DfM at NXP Semiconductors

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Publications (10)

Proceedings Article | 11 March 2010 Open Access

Realizing a 45-nm system on chip in the age of variability

Laurent Le Cam, Andy Appleby, Philippe Hurat, Benoit Carpentier, Kuang-Han Chen, Nishath Verghese

Proceedings Volume 7641, 764106 (2010) https://doi.org/10.1117/12.848023

KEYWORDS: Lithography, Chemical mechanical planarization, Design for manufacturing, Model-based design, System on a chip, Manufacturing, Metals, Databases, Design for manufacturability, Semiconductors

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Proceedings Article | 16 November 2007 Paper

3D mask modeling with oblique incidence and mask corner rounding effects for the 32nm node

Mazen Saied, Franck Foussadier, Jérôme Belledent, Yorick Trouiller, Isabelle Schanen, Emek Yesilada, Christian Gardin, Jean Christophe Urbani, Frank Sundermann, Frédéric Robert, Christophe Couderc, Florent Vautrin, Laurent LeCam, Gurwan Kerrien, Jonathan Planchot, Catherine Martinelli, Bill Wilkinson, Yves Rody, Amandine Borjon, Nicolo Morgana, Jean-Luc Di-Maria, Vincent Farys

Proceedings Volume 6730, 673050 (2007) https://doi.org/10.1117/12.752613

KEYWORDS: Photomasks, Optical proximity correction, 3D modeling, Semiconducting wafers, Diffraction, Scattering, Near field, Lithographic illumination, Systems modeling, Near field optics

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Proceedings Article | 14 May 2007 Paper

Characterization of inverse SRAF for active layer trenches on 45-nm node

Jean-Christophe Urbani, Jean-Damien Chapon, Jérôme Belledent, Amandine Borjon, Christophe Couderc, Jean-Luc Di-Maria, Vincent Farys, Franck Foussadier, Christian Gardin, Gurwan Kerrien, Laurent LeCam, Catherine Martinelli, Patrick Montgomery, Nicolo Morgana, Jonathan Planchot, Frédéric Robert, Yves Rody, Mazen Saied, Frank Sundermann, Yorick Trouiller, Florent Vautrin, Bill Wilkinson, Emek Yesilada

Proceedings Volume 6607, 66071C (2007) https://doi.org/10.1117/12.728960

KEYWORDS: SRAF, Optical proximity correction, Printing, Optical lithography, Silicon, Photomasks, Semiconducting wafers, Inspection, Optical simulations, Lithography

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Proceedings Article | 3 May 2007 Paper

OPC structures for maskshops qualification for the CMOS65nm and CMOS45nm nodes

Frank Sundermann, Yorick Trouiller, Jean-Christophe Urbani, Christophe Couderc, Jérôme Belledent, Amandine Borjon, Franck Foussadier, Christian Gardin, Laurent LeCam, Yves Rody, Mazen Saied, Emek Yesilada, Catherine Martinelli, Bill Wilkinson, Florent Vautrin, Nicolo Morgana, Frederic Robert, Patrick Montgomery, Gurwan Kerrien, Jonathan Planchot, Vincent Farys, Jean-Luc Di Maria

Proceedings Volume 6533, 65330E (2007) https://doi.org/10.1117/12.736927

KEYWORDS: Optical proximity correction, Reticles, Metals, Photoresist processing, Semiconducting wafers, Critical dimension metrology, Metrology, Manufacturing, Cadmium, Semiconductors

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Several qualification stages are required for new maskshop tools, first step is done by the maskshop internally. Taking a new writer for example, the maskshop will review the basic factory and site acceptance tests, including CD uniformity, CD linearity, local CD errors and registration errors. The second step is to have dedicated OPC (Optical Proximity Correction) structures from the wafer fab. These dedicated OPC structures will be measured by the maskshop to get a reticle CD metrology trend line. With this trend line, we can: - ensure the stability at reticle level of the maskshop processes - put in place a matching procedure to guarantee the same OPC signature at reticle level in case of any internal maskshop process change or new maskshop evaluation. Changes that require qualification could be process changes for capacity reasons, like introducing a new writer or a new manufacturing line, or for capability reasons, like a new process (new developer tool for example) introduction. Most advanced levels will have dedicated OPC structures. Also dedicated maskshop processes will be monitored with these specific OPC structures. In this paper, we will follow in detail the different reticle CD measurements of dedicated OPC structures for the three advanced logic levels of the 65nm node: poly level, contact level and metal level. The related maskshop's processes are - for poly: eaPSM 193nm with a nega CAR (Chemically Amplified Resist) process for Clear Field L/S (Lines & Space) reticles - for contact: eaPSM 193nm with a posi CAR process for Dark Field Holes reticles - for metal1: eaPSM 193nm with a posi CAR process for Dark Field L/S reticles. For all these structures, CD linearity, CD through pitch, length effects, and pattern density effects will be monitored. To average the metrology errors, the structures are placed twice on the reticle. The first part of this paper will describe the different OPC structures. These OPC structures are close to the DRM (Design Rule Manual) of the dedicated levels to be monitored. The second part of the paper will describe the matching procedure to ensure the same OPC signature at reticle level. We will give an example of an internal maskshop matching exercise, which could be needed when we switched from an already qualified 50 KeV tool to a new 50 KeV tool. The second example is the same matching exercise of our 65nm OPC structures, but with two different maskshops. The last part of the paper will show first results on dedicated OPC structures for the 45nm node.

Proceedings Article | 27 March 2007 Paper

Three-dimensional mask effects and source polarization impact on OPC model accuracy and process window

M. Saied, F. Foussadier, J. Belledent, Y. Trouiller, I. Schanen, C. Gardin, J. C. Urbani, P. K. Montgomery, F. Sundermann, F. Robert, C. Couderc, F. Vautrin, G. Kerrien, J. Planchot, E. Yesilada, C. Martinelli, B. Wilkinson, A. Borjon, L. Le-Cam, J. L. Di-Maria, Y. Rody, N. Morgana, Vincent Farys

Proceedings Volume 6520, 65204Q (2007) https://doi.org/10.1117/12.715120

KEYWORDS: 3D modeling, Photomasks, Optical proximity correction, Polarization, Process modeling, Lithium, Optical lithography, Information technology, Semiconducting wafers, Semiconductors

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Proceedings Article | 27 March 2007 Paper

32-nm SOC printing with double patterning, regular design, and 1.2 NA immersion scanner

Yorick Trouiller, Vincent Farys, Amandine Borjon, Jérôme Belledent, Christophe Couderc, Frank Sundermann, Jean-Christophe Urbani, Yves Rody, Christian Gardin, Jonathan Planchot, Will Conley, Pierre-Jerome Goirand, Scott Warrick, Frédéric Robert, Gurwan Kerrien, Florent Vautrin, Bill Wilkinson, Mazen Saied, Emic Yesilada, Patrick Montgomery, Laurent Le Cam, Catherine Martinelli

Proceedings Volume 6520, 65201D (2007) https://doi.org/10.1117/12.714116

KEYWORDS: Optical lithography, Polarization, Transistors, Double patterning technology, Resolution enhancement technologies, Printing, System on a chip, Logic, Scanners, Optical proximity correction

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Proceedings Article | 20 October 2006 Paper

Sensitivity of a variable threshold model toward process and modeling parameters

Mazen Saied, Franck Foussadier, Yorick Trouiller, Jérôme Belledent, Kevin Lucas, Isabelle Schanen, Amandine Borjon, Christophe Couderc, Christian Gardin, Laurent LeCam, Yves Rody, Frank Sundermann, Jean-Christophe Urbani, Emek Yesilada

Proceedings Volume 6349, 634919 (2006) https://doi.org/10.1117/12.686666

KEYWORDS: Calibration, Process modeling, Data modeling, Optical proximity correction, Mathematical modeling, Photoresist processing, Model-based design, Photomasks, Image processing, Image quality

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Proceedings Article | 14 March 2006 Paper

Experimental verification of improved printability for litho-driven designs

Johannes van Wingerden, Laurent Le Cam, Rene Wientjes, Michael Benndorf, Yorick Trouiller, Jerome Belledent, Rob Morton, Yuri Aksenov

Proceedings Volume 6156, 61560O (2006) https://doi.org/10.1117/12.656359

KEYWORDS: Critical dimension metrology, Lithography, Logic, Scanners, Semiconductors, Transistors, Design for manufacturing, Group IV semiconductors, Optical proximity correction, Process control

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Proceedings Article | 12 May 2005 Paper

Complementary dipole exposure solutions at 0.29 k1

Eric Hendrickx, Andres Torres, Neal Lafferty, Laurent Le Cam, Stephen Johnson, Carlo Reita, Geert Vandenberghe, Wilhelm Maurer

Proceedings Volume 5754, (2005) https://doi.org/10.1117/12.600843

KEYWORDS: Photomasks, Optical proximity correction, Reticles, Data modeling, Logic, Scanners, Optical lithography, Calibration, Semiconducting wafers, Oscillators

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Proceedings Article | 5 May 2005 Paper

Evaluating design for manufacturing with process capability analysis

Johannes van Wingerden, Laurent Le Cam, Manish Garg, Yuri Aksenov, Peter Dirksen

Proceedings Volume 5756, (2005) https://doi.org/10.1117/12.599648

KEYWORDS: Photomasks, Critical dimension metrology, Manufacturing, Semiconducting wafers, Design for manufacturing, Image processing, Electroluminescence, Lithography, Data modeling, Scanners

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