Optical characterization of PureGaB germanium-on-silicon (Ge-on-Si) photodiodes was performed for wavelengths between 255 nm and 1550 nm. In PureGaB technology, chemical vapor deposition is used to grow germanium islands in oxide windows to the silicon substrate and then cap them in-situ with nm-thin layers of first gallium and then boron, thus forming nm-shallow p+n diodes. These PureGaB Ge-on-Si photodiodes are CMOS compatible and characterized by low leakage currents. Here they are shown to have high responsivity in the whole ultraviolet (UV) to near infrared (NIR) wavelength range. Particularly, two sets of diodes were studied with respect to possible detrimental effects of the Al metallization/alloying process steps on the responsivity. Al-mediated transport of the Ge and underlying Si was observed if the PureGaB layer, which forms a barrier to metal layers, did not cover all surfaces of the Ge islands. A simulation study was performed confirming that the presence of acceptor traps at the Ge/Si interface could decrease the otherwise high theoretically attainable responsivity of PureGaB Ge-on-Si photodiodes in the whole UV to NIR range. A modification of the device structure is proposed where the PureGaB layer covers not only the top surface of the Ge-islands, but also the sidewalls. It was found that to mitigate premature breakdown, it would be necessary to add p-doped guard rings in Si around the perimeter of Ge islands, but this PureGaB-all-around structure would not compromise the optical performance.
PureB single-photon avalanche diodes (SPADs) were investigated with the aid of a newly developed TCAD-based numerical modeling method with which characteristics related to the avalanching behavior can be simulated. The p+ region forming the anode of the PureB p+n photodiode is extremely shallow, only a few nanometer deep, which is essential for obtaining a high photon detection efficiency (PDE) for near-, vacuum- and extreme-ultraviolet (NUV/VUV/EUV) light detection but when an implicit guard ring (GR) is implemented, the dark count rate (DCR) can, despite the GR, be deteriorated at the very sharp corners of the p+-region where there is a high concentration of the electric-field. By comparing measurements to simulations, the main mechanism dominating the DCR in the PureB SPADs was identified as band-to-band tunneling (BTBT) while trap-assisted-tunneling also plays a role when the perimeter breakdown is low. Increasing the dose of carriers in the enhancement region negatively impacts the total DCR of the device, but also shifts the origin of the dominant DCR contribution from perimeter to the active region. The simulations for optimization of the SPAD geometry predict that a modification of the n-doped epitaxial region of the PureB SPADs could decrease the DCR by almost two orders of magnitude. This is achieved by increasing the n-epi-layer thickness from 1 μm to 3 μm and lowering the doping from 1015 cm-3 to 1014 cm-3. A high electric field at the vertical pn junction in the active region can also be minimized by modifying the implantation parameters of the n-enhancement region thus keeping the BTBT contribution to the DCR sufficiently low.
The light emission from silicon PureB photodiodes was investigated in both forward- and avalanchemode operation and correlated to the presence of process-dependent defects that influence the reverse IV characteristics. As opposed to “defect-free” diodes with low dark currents and abrupt breakdown behavior, the diodes with defects had higher current levels and light-emitting spots appearing at voltages far below the breakdown voltage otherwise set by the implemented doping profiles. The role of such defect-related behavior for the application of the photodiodes as single-photon avalanche diodes (SPADs) and avalanche-mode light-emitting diodes (AMLEDs) is assessed in connection with the recent demonstration of these basic devices as both the light-emitting and light-detecting elements in optocoupler circuits integrated in CMOS for data transmission purposes.
PureB silicon photodiodes have nm-shallow p+n junctions with which photons/electrons with penetration-depths of a few nanometer can be detected. PureB Single-Photon Avalanche Diodes (SPADs) were fabricated and analysed by 2D numerical modeling as an extension to TCAD software. The very shallow p+ -anode has high perimeter curvature that enhances the electric field. In SPADs, noise is quantified by the dark count rate (DCR) that is a measure for the number of false counts triggered by unwanted processes in the non-illuminated device. Just like for desired events, the probability a dark count increases with increasing electric field and the perimeter conditions are critical. In this work, the DCR was studied by two 2D methods of analysis: the “quasi-2D” (Q-2D) method where vertical 1D cross-sections were assumed for calculating the electron/hole avalanche-probabilities, and the “ionization-integral 2D” (II-2D) method where crosssections were placed where the maximum ionization-integrals were calculated. The Q-2D method gave satisfactory results in structures where the peripheral regions had a small contribution to the DCR, such as in devices with conventional deepjunction guard rings (GRs). Otherwise, the II-2D method proved to be much more precise. The results show that the DCR simulation methods are useful for optimizing the compromise between fill-factor and p-/n-doping profile design in SPAD devices. For the experimentally investigated PureB SPADs, excellent agreement of the measured and simulated DCR was achieved. This shows that although an implicit GR is attractively compact, the very shallow pn-junction gives a risk of having such a low breakdown voltage at the perimeter that the DCR of the device may be negatively impacted.
A CMOS compatible Ge photodetector (Ge-PD) fabricated on Si substrates has been shown to be suitable for near infrared (NIR) sensing; linear and avalanche detection, in both proportional and Geiger modes have been demonstrated, for photon counting at room temperature . This paper focuses on implementations of the technology for the fabrication of imaging arrays of such detectors with high reproducibility and yield. The process involves selective chemical vapor deposition (CVD) of a ~ 1-μm-thick n-type Ge crystal on a Si substrate at 700°C, followed by deposition of a nm-thin Ga and B layer-stack (so-called PureGaB), all in the same deposition cycle. The PureGaB layer fulfills two functions; firstly, the Ga forms an ultrashallow p+n junction on the surface of Ge islands that allows highly sensitive NIR photodiode detection in the Ge itself; secondly, the B-layer forms a barrier that protects the Ge/Ga layers against oxidation when exposed to air and against spiking during metallization. A design for patterning the surrounding oxide is developed to ensure a uniform selective growth of the Ge crystalline islands so that the wafer surface remains flat over the whole array and any Ge nucleation on SiO2 surface is avoided. This design can deliver pixel sizes up to 30×30 μm2 with a Ge fill factor of up to 95 %. An Al metallization is used to contact each of the photodiodes to metal pads located outside the array area. A new process module has been developed for removing the Al metal on the Ge-islands to create an oxide-covered PureGaB-only front-entrance window without damaging the ultrashallow junction; thus the sensitivity to front-side illumination is maximized, especially at short wavelengths. The electrical I-V characteristics of each photodetector pixel are, to our knowledge, the best reported in literature with ideality factors of ~1.05 with Ion/Ioff ratios of 108. The uniformity is good and the yield is close to 100% over the whole array.
The Ge APD detectors are fabricated on Si by using a selective chemical-vapor deposition (CVD) epitaxial growth
technique. A novel processing procedure was developed for the p+ Ge surface doping by a sequence of pure-Ga and
pure-B depositions (PureGaB). Then, PVD Al is used to contact the n-type Si and the anode of p+n Ge diode. Arrays of
diodes with different areas, as large as 40×40 μm2, were fabricated. The resulting p+n diodes have exceptionally good IV
characteristics with ideality factor of ~1.1 and low saturation currents. The devices can be fabricated with a range of
breakdown voltages from a minimum of 9 V to a maximum of 13 V. They can be operated both in proportional and in
Geiger mode, and exhibit relatively low dark counts, as low as 10 kHz at 1 V excess reverse bias. The dark current at 1 V
reverse bias are as low as 2 pA and 20 pA for a 2×2 μm2 and 2×20 μm2 devices, respectively. Higher IR-induced current
than that induced by visible light confirms the sensitivity of Ge photodiodes at room temperature. The 25% peak in Id/Iref
at an IR-wavelength of 1100 nm in Geiger mode is measured for excess bias voltages of 3 V and 4 V, where Id refers to
the photocurrent of the 2×20 μm2 device at different wavelengths, and Iref is the reference photodiode current. The timing
response (Jitter) for the APD when exposed to a pulsed laser at 637 nm and 1 V excess bias is measured as 900 ps at full
width of half maximum (FWHM).
In this paper, the optical and electrical performance of a newly developed silicon photodiode based on pure boron CVD
technology (PureB-diodes) is introduced. Due to their extremely shallow p-n junction, with the depletion zone starting
only a few nanometers below the surface, and nm-thin pure-boron-layer coverage of the anode surface, PureB-diodes
have so far demonstrated the highest reported spectral responsivity in all sub-visible ultraviolet (UV) ranges: DUV (deep
ultraviolet), VUV (vacuum ultraviolet) and EUV (extreme ultraviolet), covering a spectrum from 220 nm down to few
nanometersMoreover, the measured responsivity at 13.5 nm wavelengths (EUV) approaches the theoretical
maximum (~0.27A/W). PureB-diodes also maintain excellent electrical characteristics, with saturation-current
values typical for high-quality silicon diodes, and a high breakdown voltage. Experimental results have demonstrated the
extremely high radiation hardness of PureB-diodes when exposed to high EUV radiant exposures in the order of a few
hundred kJ/cm2. No change in the responsivity is observed within the experimental uncertainty. In the more
challenging DUV and especially VUV ranges, PureB-diodes demonstrate a slight initial drop of responsivity (1 to 2%),
after which they stabilizes their performance.
A reflective-type liquid crystal (LC) wavefront corrector with modal addressing is described. The corrector's backplane has an array of pixel electrodes interconnected by a network of discrete resistors. The resistive network serves to form the local voltage profile that controls the phase distribution generated in the liquid crystal layer. This design is realized in a bipolar silicon technology. Preliminary numerical analysis is presented; technology and experimental results are discussed.
A method has been developed by which, after removal of the bulk silicon in a substrate transfer process, the backside of a wafer can be processed with the same lithography as the front side of the wafer. To achieve an accurate front-to-backwafer alignment accuracy, mirror symmetric alignment markers for an ASML PAS5000 waferstepper have been developed and applied in a Silicon-on- Anything process. In this manner minimum dimension low-ohmic contacts were fabricated on the backwafer. The mirror symmetric alignment markers are used in combination with standard overlay test procedures to characterize the front-to backwafer overlay accuracy. The measured overlay errors are divided up in non- mirror symmetric lens distortions and wafer distortion as a result of the substrate transfer process. The practical minimum device feature that can be realized on the backwafer is limited to 0.9-1.2 micrometers as a result of front-to-backwafer overlay errors.