The bulk of photomask demand is in technology nodes ≥65nm, using equipment, processes, and materials developed more than two decades ago1. Despite mature processes and tools, mask makers are challenged to meet continuing demand. The challenge comes not only in the forms of increased demand, but also that much of the equipment is approaching the end of its viable lifetime to support and maintain due to parts or expertise availability2. Mask writers in particular are problematic from a technical and financial perspective. Modern equipment and processes can be “too good” to simply use as a direct substitute when original equipment or processes become unavailable During initial lithography and device integration, device manufacturers tailored Optical Proximity Correction (OPC) and other wafer processing conditions based on the original mask signature for multiple mask layers. Changing to state-of-the-art mask fidelity would actually represent a liability, as the altered mask character could result in device shifts, yield reduction, or even unanticipated reliability failures. To account for the improved fidelity, re-optimization of the synergistic patterning between mask, wafer lithography and etch is required. Even on mature technologies, reintegration can require costly, difficult, and time-consuming requalification. While this path has often been pursued when manufacturers declare EOL of tools, we propose instead to contain the change in the mask shop by using Mask Process Corrections (MPC)3. Instead of using MPC to maximize mask fidelity, as is done in advanced nodes, we use MPC to replicate the original mask non-idealities on a new mask process.
With the advancement of semiconductor technology beyond 7nm, the speed and accuracy constraints on computational lithography are tightening. As the mask features become smaller and more complex, Inverse Lithography Technology (ILT) is increasingly being considered as a possible OPC solution in order to maximize process win- dow (PW) and improve CD uniformity (CDU). Until recently there has been a limitation on the adoption of curvilinear masks due to their undesirably long mask write times using vector shaped beam (VSB) mask writers, but with the introduction of Multi-beam mask writers (MBMW) in volume photomask production, mask write time is no longer a limiting factor for the usage of curvilinear masks. The key differences between correcting ILT patterns as compared to correcting rectilinear patterns explain the complexity associated with Curvilinear MPC and the corresponding longer convergence time.
Continuous efforts have been made by the computational lithography community to employ solutions from the ever evolving machine learning technology. Machine learning based solutions have been proposed for a variety of problems like mask making proximity effect correction, model based OPC, ILT and hot spot detection. An artificial neural network is an information processing system inspired by the biological nervous system in the way the brain processes information. It consists of large number of highly interconnected processing elements (neurons), working together to solve specific problems. It is a powerful data modelling tool that captures complex input/output relationships. In this work we present a neural network based solution which predicts a smart pre-bias for curvilinear features, leading to faster convergence of the correction engine.
This work presents our investigations on a new resist-slope kernel for Mask Process Correction (MPC) applications, specifically modeling the contribution (including linear and higher-order) of the resist image slope to the overall etch bias. Mask Process Correction (MPC) models with different complexities, i.e., varying number of kernels, were calibrated and compared against each other for model accuracy, layout correction run-time and dose-dependent residual trends. The results demonstrate that using the resist-slope kernel with a simpler model can allow for up to 40 percent lower correction run-time (compared to complex models) without a major degradation of the overall model accuracy. Hence, this paper presents the resist-slope kernel as a valuable addition to MPC modeling techniques, especially for situations where conventional methods are not sufficient to meet the accuracy or run time requirements.
Curvilinear mask shapes have become one of the resolution enhancement technology options in optical lithography. While this technology has been demonstrated already at the 65 nm node , it becomes a more important option beyond the 14 nm node. One of the limiting factors for deploying curvilinear mask shapes for sub-14nm nodes is the need for mask process corrections (MPC). A solution for Curvilinear MPC (CLMPC) is demonstrated and discussed in this paper along with various options for the mask data preparation flows for VSB mask writers and raster based Multi-Beam mask writers. Mask Rule Check (MRC) is identified as a critical step in this data preparation flow for curvilinear shapes, and it is demonstrated that model-based MRC is a viable solution for curvilinear mask shapes.