Dr. Marco Polli Profile

Dr. Marco Polli

Sales Director

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Publications (12)

SPIE Journal Paper | 2 July 2015

Defect mitigation and root cause studies in 14 nm half-pitch chemo-epitaxy directed self-assembly LiNe flow

Hari Pathangi, Boon Teik Chan, Hareen Bayana, Nadia Vandenbroeck, Dieter Van den Heuvel, Lieve Van Look, Paulina Rincon-Delgadillo, Yi Cao, JiHoon Kim, Guanyang Lin, Doni Parnell, Kathleen Nafus, Ryota Harukawa, Ito Chikashi, Marco Polli, Lucia D’Urzo, Roel Gronheid, Paul Nealey

JM3, Vol. 14, Issue 03, 031204, (July 2015) https://doi.org/10.1117/12.10.1117/1.JMM.14.3.031204

KEYWORDS: Etching, Scanning electron microscopy, Silicon, Inspection, Semiconducting wafers, Diffractive optical elements, Defect inspection, Thin film coatings, Directed self assembly

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Proceedings Article | 23 March 2009 Paper

Overlay metrology for double patterning processes

Philippe Leray, Shaunee Cheng, David Laidler, Daniel Kandel, Mike Adel, Berta Dinu, Marco Polli, Mauro Vasconi, Bartlomiej Salski

Proceedings Volume 7272, 72720G (2009) https://doi.org/10.1117/12.814182

KEYWORDS: Overlay metrology, Double patterning technology, Semiconducting wafers, Diffraction, Scanners, Calibration, Metrology, Diffraction gratings, Spectroscopy, Polarizers

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The double patterning (DPT) process is foreseen by the industry to be the main solution for the 32 nm technology node and even beyond. Meanwhile process compatibility has to be maintained and the performance of overlay metrology has to improve. To achieve this for Image Based Overlay (IBO), usually the optics of overlay tools are improved. It was also demonstrated that these requirements are achievable with a Diffraction Based Overlay (DBO) technique named SCOL^TM [1]. In addition, we believe that overlay measurements with respect to a reference grid are required to achieve the required overlay control [2]. This induces at least a three-fold increase in the number of measurements (2 for double patterned layers to the reference grid and 1 between the double patterned layers). The requirements of process compatibility, enhanced performance and large number of measurements make the choice of overlay metrology for DPT very challenging. In this work we use different flavors of the standard overlay metrology technique (IBO) as well as the new technique (SCOL) to address these three requirements. The compatibility of the corresponding overlay targets with double patterning processes (Litho-Etch-Litho-Etch (LELE); Litho-Freeze-Litho-Etch (LFLE), Spacer defined) is tested. The process impact on different target types is discussed (CD bias LELE, Contrast for LFLE). We compare the standard imaging overlay metrology with non-standard imaging techniques dedicated to double patterning processes (multilayer imaging targets allowing one overlay target instead of three, very small imaging targets). In addition to standard designs already discussed [1], we investigate SCOL target designs specific to double patterning processes. The feedback to the scanner is determined using the different techniques. The final overlay results obtained are compared accordingly. We conclude with the pros and cons of each technique and suggest the optimal metrology strategy for overlay control in double patterning processes.

Proceedings Article | 25 March 2008 Paper

In-line focus-dose monitoring for hyper NA imaging

Sara Loi, Alejandro Fasciszewski Zeballos, Umberto Iessi, John Robinson, Pavel Izikson, Antonio Mani, Marco Polli

Proceedings Volume 6922, 69223H (2008) https://doi.org/10.1117/12.772904

KEYWORDS: Semiconducting wafers, Metrology, Data modeling, Neural networks, Scanners, Lithography, 3D modeling, Diffractive optical elements, Finite element methods, Photoresist processing

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Proceedings Article | 22 March 2008 Paper

Industrial characterization of scatterometry for advanced APC of 65 nm CMOS logic gate patterning

Karen Dabertrand, Mathieu Touchet, Stephanie Kremer, Catherine Chaton, Maxime Gatefait, Enrique Aparicio, Marco Polli, Jean-Claude Royer

Proceedings Volume 6922, 69220W (2008) https://doi.org/10.1117/12.771614

KEYWORDS: Critical dimension metrology, Scatterometry, Optical lithography, Scanning electron microscopy, Etching, Single crystal X-ray diffraction, Semiconducting wafers, Diffractive optical elements, Carbon, Scatter measurement

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Proceedings Article | 7 March 2008 Paper

Double patterning overlay and CD budget for 32 nm technology node

Umberto Iessi, Sara Loi, Antonio Salerno, Pierluigi Rigolli, Elio De Chiara, Catia Turco, Roberto Colombo, Marco Polli, Antonio Mani

Proceedings Volume 6924, 692428 (2008) https://doi.org/10.1117/12.772795

KEYWORDS: Photomasks, Overlay metrology, Semiconducting wafers, Double patterning technology, Etching, Scanners, Metrology, Optical alignment, Lithography, Optical lithography

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Proceedings Article | 24 March 2006 Paper

In-chip optical CD measurements for non-volatile memory devices

Mauro Vasconi, Stephanie Kremer, M. Polli, Ermes Severgnini, Silvia Trovati

Proceedings Volume 6152, 61520D (2006) https://doi.org/10.1117/12.650997

KEYWORDS: Single crystal X-ray diffraction, Critical dimension metrology, Scatterometry, Silicon, Semiconducting wafers, Optical design, Reticles, Scanners, Optical testing, Etching

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Proceedings Article | 24 March 2006 Paper

AIM technology for nonvolatile memories microelectronics devices

Pier Luigi Rigolli, Laura Rozzoni, Catia Turco, Umberto Iessi, Marco Polli, Elyakim Kassel, Pavel Izikson, Yosef Avrahamov

Proceedings Volume 6152, 61524C (2006) https://doi.org/10.1117/12.656485

KEYWORDS: Overlay metrology, Metrology, Image segmentation, Front end of line, Semiconducting wafers, Chemical mechanical planarization, Metals, Lithography, Scanning electron microscopy, Scanners

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Proceedings Article | 10 May 2005 Paper

Separating cluster contribution to improve CD distribution using simultaneous dose-focus monitoring on production wafers

Louis-Pierre Armellin, Virginie Dureuil, Olivier Guillaume, Philippe Alet, Brad Eichelberger, Michel Egreteau, Marco Polli, Berta Dinu

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.598045

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Scanners, Scanning electron microscopy, Finite element methods, Calibration, Control systems, Diagnostics, Temperature metrology, Statistical modeling

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Proceedings Article | 10 May 2005 Paper

Overlay measurement accuracy verification using CD-SEM and application to the quantification of WIS caused by BARC

Laurent Lecarpentier, Vincent Vachellerie, Elyakim Kassel, Yosef Avrahamov, Chin-Chou Huang, Frank Felten, Marco Polli, Aurelien Feneyrou, Philippe Thony, Stephane Guillot

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.610662

KEYWORDS: Overlay metrology, Semiconducting wafers, Etching, Reticles, Scanning electron microscopy, Error analysis, Metrology, Detection and tracking algorithms, Scanners, Inspection

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Proceedings Article | 2 June 2003 Paper

Spectroscopic ellipsometry for lithography front-end level CD control: a complete analysis for production integration

David Herisson, DaniEle Neira, Cyril Fernand, Philippe Thony, Daniel Henry, Stephanie Kremer, Marco Polli, Marco Guevremont, Assim Elazami

Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.485031

KEYWORDS: Single crystal X-ray diffraction, Critical dimension metrology, Lithography, Scanning electron microscopy, Scatterometry, Metrology, Spectroscopic ellipsometry, Electron microscopes, Process control, Semiconducting wafers

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Proceedings Article | 3 February 2000 Paper

Reticle imaging and metrology using a CD-SEM at IMEC

A. James, F. Felten, M. Polli, Jonathan England, Thomas Marschner, Geert Vandenberghe

Proceedings Volume 3996, (2000) https://doi.org/10.1117/12.377102

KEYWORDS: Reticles, Metrology, Semiconducting wafers, Optical testing, Image processing, Lithography, Scanning electron microscopy, Deep ultraviolet, Phase shifts, 193nm lithography

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Proceedings Article | 14 June 1999 Paper

Role of LV-SEM reticle CD measurements on DUV lithography

Thomas Marschner, Ivan Pollentier, Goedele Potoms, Rik Jonckheere, Kurt Ronse, Marco Polli

Proceedings Volume 3677, (1999) https://doi.org/10.1117/12.350870

KEYWORDS: Reticles, Semiconducting wafers, Critical dimension metrology, Scanning electron microscopy, Photomasks, Optical testing, Lithography, Etching, Algorithm development, Deep ultraviolet

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Showing 5 of 12 publications

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