Dr. Mario Garcia Valderas Profile

Dr. Mario Garcia Valderas

Industrial Engineer at Univ Carlos III de Madrid

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Author

Publications (7)

Proceedings Article | 28 May 2013 Paper

FPGA-based implementation for steganalysis: a JPEG-compatibility algorithm

E. Gutierrez-Fernandez, M. Portela-García, C. Lopez-Ongil, M. Garcia-Valderas

Proceedings Volume 8764, 876407 (2013) https://doi.org/10.1117/12.2017476

KEYWORDS: Steganalysis, Image processing, Quantization, Field programmable gate arrays, Image analysis, Steganography, Internet, Clocks, Image compression, Digital image processing

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Proceedings Article | 28 May 2013 Paper

Hardening digital systems with distributed functionality: robust networks

Anna Vaskova, Marta Portela-Garcia, Mario Garcia-Valderas, Celia López-Ongil, Jorge Portilla, Juan Valverde, Eduardo de la Torre, Teresa Riesgo

Proceedings Volume 8764, 87640L (2013) https://doi.org/10.1117/12.2017474

KEYWORDS: Sensors, Sensor networks, Distributed computing, Tolerancing, Data processing, Data acquisition, Reliability, Chemical elements, Field programmable gate arrays, Humidity

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Proceedings Article | 28 May 2009 Paper

A new approach to accelerate SEU sensitivity evaluation in circuits with embedded memories

M. Portela-García, M. Garcia Valderas, C. Lopez-Ongil, L. Entrena

Proceedings Volume 7363, 73630X (2009) https://doi.org/10.1117/12.822057

KEYWORDS: Clocks, Field programmable gate arrays, Digital electronics, Content addressable memory, Chemical elements, Instrument modeling, Photomasks, System on a chip, Prototyping, Error analysis

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Proceedings Article | 28 May 2009 Paper

ModelSim-PSIM mixed signal simulation for power electronics digital control design

M. García Valderas, P. Zumel, A. Lázaro, C. López Ongil, L. Entrena

Proceedings Volume 7363, 73630V (2009) https://doi.org/10.1117/12.822051

KEYWORDS: Digital electronics, Analog electronics, Device simulation, Control systems, Field programmable gate arrays, Digital electronic circuits, Data modeling, Digital signal processing, Electronics, Prototyping

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Proceedings Article | 30 June 2005 Paper

A complete hardening method for the generation of fault tolerant circuits

Marta Portela-Garcia, Mario Garcia-Valderas, Celia Lopez-Ongil, Luis Entrena

Proceedings Volume 5837, (2005) https://doi.org/10.1117/12.608332

KEYWORDS: Tolerancing, Computer aided design, Field programmable gate arrays, Fourier transforms, Control systems, Photomasks, Clocks, Device simulation, Integrated circuits, Failure analysis

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Proceedings Article | 30 June 2005 Paper

A continuous time low-pass sigma delta modulator implemented with transmission lines

L. Hernandez, P. Rombouts, E. Prefasi, S. Paton, M. Garcia, C. Lopez

Proceedings Volume 5837, (2005) https://doi.org/10.1117/12.607359

KEYWORDS: Modulators, Clocks, Signal to noise ratio, Resistors, Prototyping, Analog electronics, Amplifiers, Feedback signals, Linear filtering, Signal processing

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Proceedings Article | 30 June 2005 Paper

Integrated circuit debug through FPGA emulation: application to a PIC-18 macrocell

Mario Garcia-Valderas, Eduardo de la Torre-Arnanz, Fernando Casado-Ortiz, Luis Entrena-Arrontes, Teresa Riesgo-Alcaide

Proceedings Volume 5837, (2005) https://doi.org/10.1117/12.608398

KEYWORDS: Sensors, Logic, Field programmable gate arrays, Signal detection, Clocks, Chromium, Signal processing, Integrated circuits, Boundary scan, Digital electronics

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Showing 5 of 7 publications

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