As photolithography will continue with 193nm immersion multiple patterning technologies for the leading edge HVM process node, the production overlay requirement for critical layers in logic devices has almost reached the scanner hardware performance limit. To meet the extreme overlay requirements in HVM production environment, this study investigates a new integrated overlay control concept for leading edge technology nodes that combines the run-to-run (R2R) linear or high order control loop, the periodic field-by-field or correction per exposure (CPE) wafer process signature control loop, and the scanner baseline control loop into a single integrated overlay control path through the fab host APC system. The goal is to meet the fab requirements for overlay performance, lower the cost of ownership, and provide freedom of control methodology. In this paper, a detailed implementation of this concept will be discussed, along with some preliminary results.
The quest to create robust control solutions for Photolithography processes is an ongoing matter. Over the past few decades several threaded and non-threaded Run-to-Run (RtR) control solutions have been introduced addressing various specific Lithography process control requirements. With continually shrinking semiconductor technology nodes, greater interdependencies are being observed between processes requiring more complex control solutions that rely on increasing process context. With higher product mixes, associated metrology costs add to this growing complexity in using existing control solutions effectively. A new dynamic RtR control solution approach in GLOBALFOUNDRIES high mix manufacturing environment offering coverage to all Lithography process steps in Fab8 has been architected and implemented. This approach not only addresses the issues caused in most commonly used ‘Threaded’ and ‘Non-Threaded’ control approaches in Lithography but also offers a dynamic thread definition implementation approach.
As leading edge lithography moves to advanced nodes in high-mix, high-volume manufacturing environment, automated control of critical dimension (CD) within wafer has become a requirement. Current control methods to improve CD uniformity (CDU) generally rely upon the use of field by field exposure corrections via factory automation or through scanner sub-recipe. Such CDU control methods are limited to lithography step and cannot be extended to etch step. In this paper, a new method to improve CDU at post etch step by optimizing exposure at lithography step is introduced. This new solution utilizes GLOBALFOUNDRIES’ factory automation system and KLA-Tencor’s K-T Analyzer as the infrastructure to calculate and feed the necessary field by field level exposure corrections back to scanner, so as to achieve the optimal CDU at post etch step. CD at post lithography and post etch steps are measured by scatterometry metrology tools respectively and are used by K-T Analyzer as the input for correction calculations. This paper will explain in detail the philosophy as well as the methodology behind this novel CDU control solution. In addition, applications and use cases will be reviewed to demonstrate the capability and potential of this solution. The feasibility of adopting this solution in high-mix, high-volume manufacturing environment will be discussed as well.
Advanced thermal annealing processes used for transistor enhancing for the state of the art process nodes induce wafer grid deformations. RTA (Rapid Thermal Anneal) and LSA (Laser Scanning Anneal) processes are a few examples. High Order Wafer Alignment (HOWA) method is an effective wafer alignment strategy for wafers with distorted grid signature especially when wafer-to-wafer grid distortion variations are also present. However, usage of HOWA in high volume production environment requires 1) careful initial determination of optimum polynomial order and alignment sampling to be implemented, and 2) matched tool monitoring and controlling strategies and infrastructures to avoid potential HOWA induced drawbacks (i.e. alignment walking).
As leading edge lithography moves to advanced nodes which requires better critical dimension (CD) control ability within wafer. Current methods generally make exposure corrections by field via factory automation or by sub-recipe to improve CD uniformity. KLA-Tencor has developed a method to provide CD uniformity (CDU) control using a generated Focus/Exposure (F/E) model from a representative process. Exposure corrections by each field can be applied back to the scanner so as to improve CD uniformity through the factory automation. CDU improvement can be observed either at after lithography or after etch metrology steps. In addition to corrections, the graphic K-T Analyzer interface also facilitates the focus/exposure monitoring at the extreme wafer edge. This paper will explain the KT CDFE method and the application in production environment. Run to run focus/exposure monitoring will be carried out both on monitoring and production wafers to control the wafer process and/or scanner fleet. CDU improvement opportunities will be considered as well.
Thermocouples are a widely used sensor in Semiconductor manufacturing because of their relatively low cost and ease of use. Most users in an attempt to improve measurement accuracy, purchase pre-calibrated thermocouples and establish replacement or re-calibration schedules. Unfortunately, these processes are often not based on actual thermocouple drift data, but most likely base don historical practice, opinion, or misinformation. This paper addresses the simple, but often misunderstood physics behind how thermocouples 'feel' temperature, and models the various sources of error that can occur with this sensor. Using this information, this paper outlines a procedure for ensuring accurate measurement in a production environment. The electronics used to convert the thermocouple signal to a temperature is discussed, along with how thermocouples are calibrated and why in-situ calibration in the field is not practical. Sources of measurement error are modeled including incoming calibration error, manual data-entry error of calibration data, tool or electronically induced error, and drift over time. These sources of error are described and modeled for 'type R' thermocouples, the most widely used thermocoupled for high temperature diffusion applications, using over five years of manufacturing data from over 70 horizontal and vertical diffusion furnaces.