We demonstrate for the first time flat-top interleavers based on cascaded Mach-Zehnder interferometers (MZIs) which use only single multimode interferometers (MMIs) as power splitters. Our previous designs were based on 4-stage cascades of MZIs, where we used single MMIs and double MMIs to achieve 85:15 splitting ratio and 31:69 splitting ratio respectively. This time, we propose instead a greatly simplified 2-stage configuration using only single MMIs, including a standard 50:50 MMI, and two tapered MMIs to achieve 71:29 and 92:08 splitting ratios. We have designed the interleaver based on its geometrical representation on the Bloch sphere, then confirmed by efficient 2D simulations of the building blocks and of the whole structure, based on the eigenmode expansion method. We show how important is to take into account the phase relations between the outputs of all MMIs in order to make a working design. We have successfully fabricated devices with different channel spacing on our micron-scale silicon photonics platform, and measurement results confirmed their expected flat-top operation on a broad band. Using only single MMI splitters we can not only greatly outperform the bandwidth achieved by standard directional couplers, but we can also ensure much higher robustness to fabrication errors, also compared to previous demonstrations based on double MMIs. Indeed, when compared to those previous attempts, the new results prove tapered MMIs to be the most robust approach to achieve arbitrary splitting ratios.
This paper presents our recent progress on fast germanium photodetector (PD) development for our 3μm silicon-on - insulator (SOI) platform. We have fabricated a horizontal PIN photodiode, which has a 3dB cutoff frequency of 40GHz and responsivity of 1.0 A/W at -1V bias for operation wavelength of 1.55μm. The high bandwidth indicates that the detector speed is limited by the transit time of the carriers over the i-region rather than the junction capacitance. The electric field in the i-region at -1V is high enough to maintain the carrier drift speed close to the maximum velocity of carriers in the Ge. The device is realized using selectively grown germanium with very low amount of stress induced crystal defects. The detector area and the Si waveguides were patterned with a common hard mask, which enables accurate lateral alignment between them. The n- and p-contacts were directly made on the Ge using Ti/Al metallization. The vertical sidewalls of the detector area were implanted in order to create the horizontal PIN structure. The subsequent dopant diffusion was estimated to secure the i-region and the junctions by controlling the thermal budget, as the two dopants have different diffusion mechanism in Ge. One of the advantages of our micron scale waveguides is that due to the high confinement of the optical mode within the Si waveguide they allow light coupling into a short detector. The junction capacitances are therefore small as the detector area is only 1x9μm. In addition, the electrical output pulse shape is not distorted by the slow diffusion current of electrons and holes as the incoming light do not overlap the doped n- and n-regions.
This paper explains and demonstrates the unique properties of micron-size silicon-on-insulator (SOI) waveguides. It gives an overview of the silicon photonics research at VTT, as well as latest R&D highlights. The benefits of high mode confinement in rib and strip waveguides are described, reaching from low losses and small footprint to polarization independent operation and ultra-wide wavelength range from 1.2 to over 4 μm. Most of the results are from photonic integrated circuits (PICs) on 3 μm SOI, while a 25 Gbps link with a transceiver on 12 μm SOI is also reported. Wavelength multiplexing and filtering is demonstrated with some breakthrough performance in both echelle gratings and arrayed waveguide gratings. Lowest losses are below 1 dB and lowest cross-talk is below -35 dB. Progress towards monolithically integrated, broadband isolators is described, involving polarization splitters, reciprocal polarization rotators and nonreciprocal Faraday rotation in 3 μm SOI waveguide spirals. Quick update is presented about switches, modulators and Ge photodiodes up to 15 GHz bandwidth. Hybrid integration of lasers, modulators and photodiodes is also reported. The added value of trimmed SOI wafers and cavity-SOI wafers in Si photonics processing is addressed. Latest results also include up-reflecting mirrors with <0.5 dB loss, which support wafer-level testing and packaging.
We show theoretically and experimentally how a flat-top second-order response can be achieved with a self-coupled single add-drop ring resonator based on two couplers with different splitting ratios. The resulting device is a 1x1 filter, reflecting light back in the input waveguide at resonating wavelengths in the passbands, and transmitting light in the output waveguide at all other non-resonating wavelengths. Different implementations of the filter have been designed and fabricated on a micron-scale silicon photonics platform. They are based on compact Euler bends - either U-bends or Lbends - and Multi-Mode Interferometers as splitters for the ring resonators. Different finesse values have been achieved by using either 50:50 MMIs in conjunction with 85:15 MMIs or 85:15 MMIs in conjunction with 95:05 double MMIs. Unlike ordinary lowest order directional couplers, the MMIs couple most of the power in the cross-port which make them particularly suitable for the topology of the self-coupled ring, which would otherwise require a waveguide crossing. Experimental results are presented, showing good agreement with simulations. The proposed devices can find applications as wavelength-selective reflectors for relatively broad-band lasers or used as 2x2 add-drop filters when two exact replicas of the device are placed on the arms of a Mach-Zehnder interferometer.
Integrated circuits based on micron-scale silicon waveguides have the clear advantage of being tolerant to fabrication errors, thanks to the high mode confinement within the guiding core. Here we show how flat-top interleavers can be achieved on a micron-scale silicon photonics platform based on ring-loaded Mach-Zehnder Interferometers (MZIs), without the need for any thermal tuning. Robust designs are also guaranteed by resorting to Multi-Mode Interferometers (MMIs) as power splitters in both the MZIs and the ring resonators. A trade-off between in-band ripple and roll-off can be achieved by changing the ring splitting ratios. In particular rings with different finesse based on MMIs with 50:50, 72:28, and 85:15 splitting ratios have been designed, fabricated and successfully tested. In-band ripples as low as 0.2 dB and extinction ratios exceeding 15 dB have been measured from the fabricated samples. Repeatability of the performances from chip to chip and wafer to wafer is presented to show the tolerance of the devices to fabrication errors. Even though these particular devices have been designed for TE polarization only, polarization insensitive designs can be also achieved. All designs are based on strip waveguides and compact Euler-bends, leading to footprints in the order of 700x300 μm2, also thanks to an optimized configuration. They can find applications as interleavers as such or as stages in cascades of N interleavers to achieve flat-top 1x2N (de)multiplexers.
We introduce a novel type of chiral spiral waveguide where the usual waveguide crossings are replaced by 100:0 Multimode Interferometers (MMIs), i.e. 2x2 splitters that couple all the input light in the cross output port. Despite the topological equivalence with the standard configuration, we show how resorting to long MMIs has non-trivial advantages in terms of footprint and propagation length. An accurate analytic model is also introduced to show the impact of nonidealities on the spiral performances, including propagation loss and cross-talk. We have designed and fabricated three chiral spirals on our platform, based on 3 μm thick silicon strip waveguides with 0.13 dB/cm propagation loss, and 1.58 mm long MMIs. The fabricated spirals have 7, 13 and 49 loops respectively, corresponding to the effective lengths 6.6 cm, 12.5 cm and 47.9 cm. The proposed model is successfully applied to the experimental results, highlighting MMI extinction ratio of about 16.5 dB and MMI loss of about 0.08 dB, that are much worse compared to the simulated 50 dB extinction and 0.01 dB loss. This imposes an upper limit to the number of rounds, because light takes shortcuts through the bar MMI ports. Nevertheless, the novel chiral spiral waveguides outperform what is achievable in mainstream silicon photonics platforms based on submicron waveguides in terms of length and propagation losses, and they are promising candidates for the realization of integrated gyroscopes. They can be significantly further improved by replacing the MMIs with adiabatic 100:0 splitters, ensuring lower cross-talk and broader bandwidth.
Multimode Interferometers (MMIs) are an attractive alternative to directional couplers, ensuring more relaxed tolerances to fabrication errors and broader operation bandwidth. The drawback is that only a limited discrete set of splitting ratios is achievable with MMIs of constant cross section. This issue clearly limits their use in flat-top interferometric filters, which design requires, in general, free choice of the splitting ratios. Here we show for the first time that it is possible to design 4-stage flat-top interferometers using only standard MMIs with 50:50 and 85:15 splitting ratios. The design approach is based on the representation of the system on the Bloch sphere. Flat-top interleavers with different free spectral ranges have been designed and fabricated on the silicon photonics platform of VTT, based on 3 μm thick rib and strip waveguides. Two different layouts have been explored: one where all components are collinear and a more compact one which elements have been folded in a spiral shape. All interleavers have been designed for TE polarization, and they work in a wavelength range comparable with the 100 nm bandwidth of the MMI splitters. Even though fabrication imperfections and non-ideal behaviour of both waveguide bends and MMIs led to reduced extinction compared to simulations, most devices show in-band extinction exceeding 15 dB. The in-band losses of the most central channels did not exceed 1.5 dB compared to the reference straight waveguide. The designed interleavers can be employed in cascaded configurations to achieve broadband and fabrication tolerant flat-top wavelength (de)multiplexers.
We present a vision for transceiver integration on a 3 μm SOI waveguide platform for systems scalable to Pb/s. We also
present experimental results from the first building blocks developed in the EU-funded RAPIDO project. At 1.3 μm
wavelength 80 Gb/s per wavelength is to be achieved using hybrid integration of III-V optoelectronics on SOI. Goals
include athermal operation, low-loss I/O coupling, advanced modulation formats and packet switching. An example of
the design results is an interposer chip that consists of 12 μm thick SOI waveguides locally tapered down to 3 μm to
provide low-loss coupling between an optical single-mode fiber array and the 3 μm SOI chip. First example of
experimental results is a 4x4 cyclic AWGs with 5 nm channel spacing, 0.4 dB/facet fiber coupling loss, 3.5 dB center-tocenter
loss, and -23 dB adjacent channel crosstalk in 3.5x1.5 mm2 footprint. The second example result is a new VCSEL
design that was demonstrated to have up to 40 Gb/s operation at 1.55 μm.
Total internal reflection (TIR) mirrors represent an ultra-compact and flexible method to turn light in a photonic
integrated circuit (PIC). These can also have very broadband and polarisation independent operation. This paper presents
results from 90 degree strip waveguide turning mirrors with novel geometry on a 3 μm SOI waveguide platform. The
new TIR mirrors have record-low insertion loss of 0.08 dB/mirror. They are compared with previous designs that have
demonstrated insertion losses down to 0.15 dB/mirror. The test structures consisted of up to 96 consecutive mirrors and
were fabricated in a multi-project wafer run. The multi-moded test devices only propagate light in the fundamental
mode. The mirrors can be used in single-mode PICs that combine low losses, small polarisation dependency, wide
bandwidth and small footprint.
Long and yet compact spiral waveguides based on micron-scale silicon strip waveguides has been enabled very recently by the introduction of the Euler bends. By ensuring effective broadband single mode operation of otherwise highly multimodal waveguides, these bends can have very low losses (<0.01 dB/90°) even with effective radii of a few microns. Together with the low propagation losses (< 0.15 dB/cm) of micron-scale strip waveguides, these bends enable centimeter-long delay lines with negligible losses and very small foot-print (< 1 mm2). In particular, interferometers delayed by ≈ 1 cm long spirals on one of the two arms have been fabricated on SOI wafers with both 3 um- and 4 umthick silicon layer, based on the well assessed process developed by VTT. The full devices have footprint smaller than 1.5 mm2, and they have been measured to have extinction ratios < 15 dB (reaching up to 21 dB) and about 3 dB excess losses. Functional characterization of the delayed interferometers at about 10 Gbps through demodulation of pseudorandom Differential Phase Shift Keying signals led to clearly opened eye diagrams with Q factor of 8.6 and bit error rates lower than 10-15.
1x1 optical resonators have been designed based on multi-mode interference (MMI) splitters of different splitting ratios (85:25 and 73:27) and different types of back-reflectors as feedback mechanism. They are basically 2x2 MMIs of uneven splitting ratios with one of the ports from both sides ending in a reflector. The chosen reflectors include metal-dielectric mirrors, waveguide loops and MMI reflectors. The remaining two ports play the role of input and thru port respectively. The resonant wavelengths are reflected back in the input port, hence acting also as output port in reflection. The devices have been fabricated on SOI wafers with a 3 μm-thick silicon layer. In all cases, the quality factors of the resonances of a given resonator have been found to significantly change form peak to peak. This can be attributed to wavelength dependent losses in the feedback mechanisms, that is wavelength dependent reflectivity of the back-reflectors. Through a suitable transfer matrix model, we have found that best performing devices correspond to reflectivity as high as 92% for the metal/dielectric mirrors and 88% for the MMI reflectors, corresponding to a resonator finesse of 13.1 and 9.9 respectively. The free spectral ranges of the resonators vary from about 3 nm to about 1 nm, depending on the cavity length, which is constrained by the lengths of both the MMIs and the reflectors. When suitably combined with gain elements, the proposed resonators are promising candidates as fabrication tolerant wavelength selective reflectors for external cavity lasers.
We present the first characterization results of some cascaded interleavers that we have recently fabricated on 4 μm thick Silicon on Insulator (SOI) wafers. The filters are based on strip waveguides, micron-scale bends and compact MMIs, all components with low loss and high tolerance to fabrication errors, due to the high mode confinement in the silicon region. A thorough comparison of the found results with the theoretical model will be presented, taking into account fabrication limitations. The fabricated filters will be used in the optical RAM circuits of the RAMPLAS project funded by the European Commission.
We present our recent breakthrough for high density integration in micron-scale thick semiconductor platforms. The novel bend concept is presented from a theoretical point of view and supported by experimental results on silicon strip waveguides, including the smallest low-loss bends ever reported for an optical waveguide. Some experimental example applications to resonators, spirals, and Mach-Zehnder interferometers are also presented, along with envisaged applications to other semiconductor platforms. A special focus will be dedicated to potential applications in III-V platforms, where the novel bend could lead to unprecedented dense integration of devices as well as to novel concepts for active components.
Hybrid integration on Silicon-on-Insulator (SOI) has emerged as a practical solution for compact and high-performance
Photonic Integrated Circuits (PICs). It aims at combining the cost-effectiveness and CMOS-compatibility benefits of the
low-loss SOI waveguide platform with the versatile active optical functions that can be realized by III-V photonic
materials. The utilization of SOI, as an integration board, with μm-scale dimensions allows for an excellent optical mode
matching between silicon rib waveguides and active chips, allowing for minimal-loss coupling of the pre-fabricated IIIV
components. While dual-facet coupling as well as III-V multi-element array bonding should be employed to enable
enhanced active on-chip functions, so far only single side SOA bonding has been reported. In the present
communication, we present a novel integration scheme that flip-chip bonds a 6-SOA array on 4-μm thick SOI
technology by coupling both lateral SOA facets to the waveguides, and report on the experimental results of wavelength
conversion operation of a dual-element Semiconductor Optical Amplifier – Mach Zehnder Interferometer (SOA-MZI)
circuit. Thermocompression bonding was applied to integrate the pre-fabricated SOAs on SOI, with vertical and
horizontal alignment performed successfully at both SOA facets. The demonstrated device has a footprint of 8.2mm x
0.3mm and experimental evaluation revealed a 12Gb/s wavelength conversion operation capability with only 0.8dB
power penalty for the first SOA-MZI-on-SOI circuit and a 10Gb/s wavelength conversion operation capability with 2 dB
power penalty for the second SOA-MZI circuit. Our experiments show how dual facet integration can significantly
increase the level of optical functionalities achievable by flip-chip hybrid technology and pave the way for more
advanced and more densely PICs.
Silicon photonics is a rapidly growing R&D field where universities, institutes and companies are all involved and the business expectations for the next few years are high. One of the key enabling elements that led to the present success of silicon photonics is ePIXfab. It is a consortium of institutes that has together offered multi-project wafer (MPW) runs, packaging services, training, and feasibility studies. These services have significantly lowered the barrier of various research groups and companies to start developing silicon photonics. Until now the MPW services have been offered by the ePIXfab partners IMEC, CEA-Leti and IHP, which all use CMOS-type silicon photonics technology with a typical silicon-on-insulator (SOI) waveguide thickness of 220 nm. In November 2013 this MPW offering was expanded by the ePIXfab partner VTT that opened the access to its 3 μm SOI waveguide platform via ePIXfab MPW runs. This technology platform is complementary to the mainstream silicon photonics technology (220 nm) and it offers such benefits as very low losses, small polarization dependency, ultrabroadband operation and low starting costs
We have recently characterized spirals waveguides based on 4 μm thick strip waveguides with suitably designed lowloss micron scale bends. Different bends and different lengths have been tested to extrapolate propagation losses and bending losses. In particular lowest bending losses have been found to be smaller than 0.01 dB per turn, while propagation losses are about 0.15 dB/cm. Very small footprint is achieved thanks to a novel bend concept combined to waveguide pitches of a few microns. The unique properties of our waveguides make our platform the ideal one for low loss long spiral waveguides with very small footprint.
We present a method to etch vertical and smooth silicon sidewalls. The so-called modified Bosch process combines a passivation step, a breakthrough step, and an anisotropic etch step within one repeatable loop. Thanks to the sidewall protection from the passivation step and the anisotropic nature of the etch step, this method can etch smoother silicon sidewalls than either a typical Bosch process or a continuous anisotropic etch process. The silicon sidewall of a 4-μm-deep waveguide structure etched by this method has a root mean square roughness below 10 nm and a peak-to-valley (P-V) roughness below 60 nm. Comparisons between silicon waveguides etched by this process and by another deep reactive-ion etching process showed remarkable improvement in propagation loss at the wavelength of 1550 nm.
The minimum bending radius of optical waveguides is typically the most important parameter that defines the footprint
and cost of a photonic integrated circuit. In optical fibers and in planar waveguides with equally large mode fields
(~10 μm) the bending radii are typically in the cm-scale. The main advantage of using a high index waveguide core with
a thickness below 1 μm is the ability to realise single-mode bends with bending radii of just a few micrometers.
In this paper we review the dependence of the minimum bending radius on the size and shape of waveguides with the
main emphasis on silicon-on-insulator (SOI) waveguides. Then we present simulation and measurement results from
advanced waveguide bends and mirrors that have been integrated with 4-10 μm thick single-mode SOI waveguides. We show that multi-step patterning and novel designs allow the reduction of the bending radius by up to three orders of
magnitude while also reducing the bending losses by approximately one order of magnitude when compared to
traditional rib waveguide bends on 4 μm SOI. This allows to use the μm-scale SOI waveguides for making almost as
compact photonic integrated circuits as those based on sub-μm SOI waveguides.
We present novel deeply etched functional components, fabricated by multi-step patterning in the frame of our 4 μm
thick Silicon on Insulator (SOI) platform based on singlemode rib-waveguides and on the previously developed rib-tostrip
converter. These novel components include Multi-Mode Interference (MMI) splitters with any desired splitting
ratio, wavelength sensitive 50/50 splitters with pre-filtering capability, multi-stage Mach-Zehnder Interferometer (MZI)
filters for suppression of Amplified Spontaneous Emission (ASE), and MMI resonator filters. These novel building
blocks enable functionalities otherwise not achievable on our SOI platform, and make it possible to integrate optical
RAM cell layouts, by resorting to our technology for hybrid integration of Semiconductor Optical Amplifiers (SOAs).
Typical SOA-based RAM cell layouts require generic splitting ratios, which are not readily achievable by a single MMI
splitter. We present here a novel solution to this problem, which is very compact and versatile and suits perfectly our
technology. Another useful functional element when using SOAs is the pass-band filter to suppress ASE. We pursued
two complimentary approaches: a suitable interleaved cascaded MZI filter, based on a novel suitably designed MMI
coupler with pre-filtering capabilities, and a completely novel MMI resonator concept, to achieve larger free spectral
ranges and narrower pass-band response. Simulation and design principles are presented and compared to preliminary
experimental functional results, together with scaling rules and predictions of achievable RAM cell densities. When
combined with our newly developed ultra-small light-turning concept, these new components are expected to pave the
way for high integration density of RAM cells.
We present a concept where GaAs chips with dilute nitride and quantum dot optoelectronics are hybrid integrated on a
silicon-on-insulator (SOI) waveguide platform and packaged into low-cost modules using silicon as the packaging
material. The approach aims to offer high energy efficiency, low cost and high bandwidth for optical interconnects
operating at 1.2-1.3 μm wavelengths. It presents technologies that could bridge the gap between long and short range
optical communication, which are presently based on incompatible wavelength ranges and waveguiding technologies
(single vs. multimode).
We present the design, fabrication and characterisation of wavelength selectors integrated on silicon-on-insulator (SOI)
chips. The devices are able to select one out of 100 or 110 wavelength channels, that could each be modulated at 10
Gb/s. This represents an aggregate input data rate of 1 Tb/s. Wavelength selection is based on successive arrayed
waveguide gratings (AWGs) and semiconductor optical amplifier (SOA) arrays hybrid integrated on SOI. The passed
wavelength channel is coupled to a hybrid integrated photodiode. The sub-ns response time of the SOAs enables very
fast wavelength selection that can be exploited in various communication applications.
In this paper we present the integration of an InP-based photodetector with silicon-on-insulator (SOI) waveguides using
thermocompression bonding. A BCB prism integrated on top of the light-sensitive area of a planar detector (PD) chip
deflects the light from a 4 μm thick SOI waveguide upward into the flip-chip bonded PD. A trench is etched in front of
the SOI waveguide to accommodate prisms with apexes up to 7 μm. Using thermocompression bonding between thin
gold pads (~500 nm thickness) deposited on both, SOI and photodetector chips an excellent vertical alignment accuracy
of ±100 nm can be achieved, limited only by etching and Au-deposition tolerances. A commercial flip-chip bonder
provides a lateral alignment accuracy also in the sub-micron range. Together with a previously developed process for
integrating lasers and SOA chips using the same technology, fully functional PICs can now be realized on the SOI
platform using thermocompression bonding.
Compound semiconductors provide state-of-the-art performance in optoelectronics, while silicon-on-insulator (SOI) is an ideal platform for many passive functions in integrated optics. By combining them one can realise optical devices with high performance and low cost. This paper discusses the various applications and technologies for integrating InP chips with SOI waveguides. Bonding of lasers, SOA arrays and detectors for practical applications is described. Experimental results are given for visually aligned thermo-compression bonding and self-aligned flip-chip bonding with Indium bumps. Flip-chip bonding is reported directly on SOI chips, as well as on a separate silicon-optical-bench.
An overview of the present silicon-on-insulator (SOI) waveguide technology is given and supplemented with an extensive set of theory and simulation results. Characteristics of slab-, rectangular- and ridge waveguides in SOI are explained. In particular, the number of modes and the single-mode conditions are carefully analyzed. Experimental work with straight and bent 8 to 10 μm thick SOI ridge waveguides and a very fast thermo-optical switch are reported. Propagation loss in a very long spiral waveguide down to 0.3 dB/cm, waveguide birefringence below 10-4, and a switching frequency up to 167 kHz were obtained. A very promising multi-step patterning principle for SOI waveguides is described together with many practical application examples.
Thermo-optical silicon-on-insulator (SOI) waveguide switch has been fabricated and characterized. The switch is based on a 2x2 Mach-Zehnder interferometer and 9 microns thick ridge waveguides. The extinction ratio of the switch is 17 dB with ultra-slow modulation and it is limited by the unoptimized directional coupler lengths. Thermo-optical switching with conventional on/off modulation was demonstrated up to 10 kHz. The average power consumption was 150 mW and the extinction ratio was 15 dB in 10 kHz square wave modulation. By using a novel modulation principle the maximum frequency was rised up to 167 kHz, while still maintaining the 15 dB extinction ratio in square wave modulation. With random binary modulation at 167 kHz frequency (3 μs per bit) the extinction ratio remained above 13 dB and the average power consumption was 590 mW. The obtained frequency limits for square wave modulation correspond to a maximum of 1% deviation from the attainable extinction ratio limits. With less strict extinction ratio requirements the maximum frequencies can be much higher. The new modulation method can be used to radically speed up interferometric switches with a tolerable increase in the power consumption.
In this work the feasibility of the atomic layer deposition (ALD) in producing erbium-doped waveguides is studied. Two microns thick erbium-doped aluminum oxide layers were grown with ALD on silica-coated silicon wafers. The waveguides were patterned using photolithography and wet etching. Resulted single-mode ridge-type waveguides were measured to obtain absorption, emission, fluorescence lifetime, and gain characteristics. Optical pumping was done using the 980 nm wavelength. The material showed broad emission spectrum with FWHM of 52 nm and maximum absorption of 6.2 dB/cm at 1530 nm. Maximum signal enhancement of 2.6 dB/cm was measured at 1530 nm for the 20 dBm signal power.
A survey of the most common silicon-on-insulator (SOI) substrates and waveguide structures, as well as an evaluation of their applicability in optical telecommunication at the 1550 nm wavelength is presented. The design, fabrication and characterization of straight and bent SOI waveguides, as well as a thermo-optical SOI switch are described. The propagation loss of the realized SOI waveguides is below 0.25 dB/cm and thermo-optical switching is demonstrated at 10 kHz. The effect of cladding material on top SOI ridge waveguides on the polarization properties of straight and bent waveguides, as well as on directional couplers, is discussed. Both polarization independent and polarization maintaining waveguides are demonstrated. Finally, a basic principle of multi-step SOI waveguides is proposed. As examples of the potential in multi-step processing, efficient coupling between different rectangular, ridge and photonic crystal waveguides, ultra-small bends, waveguide mirrors, and extremely short multi-mode interference couplers are described.