In 2019 we have seen the first 7 nm logic devices, manufactured on ASML NXE:3400 scanners, hitting the market. In this paper we will give an update on the performance improvements to further optimize these systems for High Volume Manufacturing (HVM), related to the lithographic performance, productivity and uptime.
We will also demonstrate that for the 5 nm logic node and 10nm-class DRAM, excellent overlay, focus, and critical dimension (CD) control have been realized. In combination with intrinsic tool stability and holistic control schemes, including (resist and tool) performance improvements addressing stochastics issues, this provides the required performance for HVM for these nodes.
Finally we will discuss the ASML roadmap for meeting the requirements for the 3 nm node and beyond.
In this paper, we provide an overview of state-of-the-art technologies for incoherent laser-produced tin plasma extreme-ultraviolet (EUV) sources at 13.5nm with performance enabling high volume semiconductor manufacturing (HVM). The key elements to development of a stable and reliable source that also meet HVM throughput requirements and the technical challenges for further scaling EUV power to increase productivity are described. Improvements in availability of droplet generation and the performance of critical subsystems that contribute to EUV collection optics lifetime toward the one tera-pulse level, are shown. We describe current research activities and provide a perspective for EUV sources towards the future ASML Scanners.
In this paper we report on the performance enhancements on the NXT immersion scanner platform to support the immersion lithography roadmap. We particular discuss scanner modules that enable future overlay and focus requirements. Among others we describe the improvements in grid calibrations and grid matching; thermal control of reticle heating with dynamic systems adjustments; aberration tuning and FlexWave-lens heating control as well as aberration- and overlay-metrology on wafer-2-wafer timescales. Finally we address reduction of leveling process dependencies, stage servo dynamics and wafer table flatness to enhance on-product focus and leveling performance. We present and discuss module- and system-data of the above mentioned scanner improvements.
Mainstream high-end lithography is currently focusing on 32 nm node and 22 nm node where 1.35 NA immersion
technology is well established for the most critical layers. Double-patterning and spacer-patterning techniques have been
developed and are being widely used to print the most critical layers.
Further down the lithography roadmap we see 1x nm nodes coming where EUV lithography will take over critical
layers from immersion. In order to enable a smooth industry-wide transition towards EUV, 1.35 NA immersion
technology will continue to play a critical role in manufacturing front end layers in the coming years. Using immersion
technology beyond the 22 nm node, we expect an increase in the use of double and even quadruple patterning
technology for the critical layers. This demands tighter control of especially overlay and focus performance on the 1.35
NA immersion tools. Also fully flexible illumination and wave front control will be needed to optimize the contrast for
these low k1 applications.
In this paper we present the state-of-the-art system performance of today's 1.35 NA ArF immersion tool production
workhorse, the TWINSCAN NXT:1950i. Furthermore we show the required scanner improvements on imaging, overlay
and cost of ownership to enable device shrink below the 20 nm node in 2013 using immersion technology.
Immersion lithography has been developed in a tremendous pace. Starting in late 2001, the technology now has moved
to volume production of advanced flash memories. The immersion exposure system has been the key enabler in this
progress. In this paper we discuss the evolution of the TWINSCAN immersion scanning exposure tools, and present an
overview of its performance on imaging, lens heating control, overlay, focus and defects. It is shown that stable
performance assures 45-nm device volume manufacturing. Extendibility of immersion towards 38-nm and 32-nm is
discussed. For NAND the next device half pitch will be around 38-nm and it is shown that with 1.35 NA and low k1
dipole or CQUAD illumination a final extension with single exposure is possible. For the 32-nm node and beyond
double patterning methods are required till EUV lithography is ready to be used in volume production. To secure tight
CD tolerance the overlay performance of the immersion tools need to be tightened to numbers well below 3-nm. The
paper presents overlay improvements towards the requirements for double patterning.
This paper discusses the current performance and the evolution of five generations TWINSCAN immersion scanning
exposure tools. It is shown that production worthy overlay and focus performance can be achieved at high scan speeds.
The more critical part for immersion tools is related to defects, but also here improvements resulted in production
worthy defect levels. In order to keep the defect level stable special measures are needed in the application of wafers.
Especially Edge Bead Removal (EBR) design and wafer bevel cleanliness are important.
This paper discusses the types and formation of immersion defects. It is shown that drying stains and water marks are the main immersion defects. The immersion defects are related to resist leaching, water penetration and droplet formation. It is shown that scanner immersion hood design based on an actuated air gap and air curtain droplet clean-up minimizes defect counts. Additionally, pre-and post soaks steps in the track can reduce drying stains and water marks. The defect performance is evaluated on XT:1250i and XT:1400i systems. It is shown that the immersion defect density can go as low as 0.01 /cm2, which is well below the ITRS 2005 number of 0.03 /cm2.