In recent years, CCD-in-CMOS TDI image sensors are becoming increasingly popular for many small satellite missions to assure a fast and affordable access to space for Low Earth Observation. Our monolithic CCD-inCMOS TDI imager features a specifically developed technology which combines the benefits of a classical CCD TDI with the advantages of CMOS System-On-a-Chip (SoC) design. Like CCD, this detector is also controlled by a large number of clock voltages. Optimizing these voltages allows to increase the performance of the detector by improving multiple characteristic parameters, such as full well capacity (FWC), dark current, linearity, dark signal non-uniformity (DSNU) and charge transfer efficiency (CTE). Traditionally, it has been the standard practice to adjust the CCD voltages by trial and error methods to get a better image. Because of the large parameter space, such subjective procedures may yield far from the optimum performance. This paper reports a design of experiments (DOE) technique applied on the clock voltages to improve the multiple performance parameters of the detector. This method utilizes the Taguchi’s orthogonal arrays of experiments to reduce the number of experiments with different voltage combinations. Finally, optimal combination of clock voltages is obtained by converting the multiple performance parameters of the detector into a single Grey relational grade. In this process, the sequences of obtaining parameter values are categorized according to the performance characteristics. The condition Higher-the-better is used for parameters like FWC and CTE whereas condition Lower-the-better is applied for parameters, such as dark current, linearity error and DSNU.
CMOS image sensors for visible wavelength range have been receiving much attention over the last two decades, offering ultra-low power and camera-on-chip integration. Imagers are now able to extract additional information from the scene thanks to infrared sensing for recognition or Time-of-Flight for 3D imaging. Such capabilities enable an unlimited amount of applications in several businesses, i.e. automotive, industrial, life science, security, agricultural or consumer. Imec has been continuously developing advanced technologies together with innovative pixel and circuit architectures to realize prototypes for various scientific applications. Thanks to state-of-the-art IIIV and thin-film (organics or quantum dots) material integration experience combined with imager design and manufacturing, imec is proposing a set of research activities which ambition is to innovate in the field of low cost and high resolution NIR/SWIR uncooled sensors as well as 3D sensing in NIR with Silicon-based Time-of-Flight pixels. This work will present the recent integration achievements with demonstration examples as well as development prospects in this research framework.
This paper reports on a Time Delay and Integration image sensor System-on-Chip realized in an embedded CCD process. The integration of single-poly CCD modules into a standard 0.13?m CMOS process is discussed. The technology performance has been evaluated using dedicated test structures. Next, a prototype TDI imager with 5?m pixel pitch, 512 rows and 1024 columns was designed, manufactured and characterized. Charge Transfer Efficiency greater than 0.9999 up till very high line rates of 400kHz was recorded.
The current CMOS image sensors market trend leads to achieve good image resolution at small package size and price,
thus CMOS image sensors roadmap is driven by pixel size reduction while maintaining good electro-optical
performances. As both diffraction and electrical effects become of greater importance, it is mandatory to have a
simulation tool able to early help process and design development of next generation pixels.
We have previously introduced and developed FDTD-based optical simulations methodologies to describe diffraction
phenomena. We recently achieved to couple them to an electrical simulation tool to take into account carrier diffusion
and precise front-end process simulation. We propose in this paper to show the advances of this methodology.
After having detailed the complete methodology, we present how we reconstruct the spectral quantum efficiency of a
pixel. This methodology requires heavy-to-compute realistic 3D modeling for each wavelength: the material optical
properties are described over the full spectral bandwidth by a multi-coefficient model, while the electrical properties are
set by the given process and design. We optically simulate the propagation of a dozen of wavelengths at normal
incidence and collect the distribution of the optical generation then we insert it in the electrical simulation tool and
collect the final output quantum efficiency.
Besides, we compare the off-axis performance evaluations of a pixel by simulating its relative illumination in a given
wavelength. In this methodology several plane waves are propagated with different angles of incidence along a specific