Two ultrahigh-speed CCD image sensors with different characteristics were fabricated for applications to advanced scientific measurement apparatuses. The sensors are BSI MCG (Backside-illuminated Multi-Collection-Gate) image sensors with multiple collection gates around the center of the front side of each pixel, placed like petals of a flower. One has five collection gates and one drain gate at the center, which can capture consecutive five frames at 100 Mfps with the pixel count of about 600 kpixels (512 x 576 x 2 pixels). In-pixel signal accumulation is possible for repetitive image capture of reproducible events. The target application is FLIM. The other is equipped with four collection gates each connected to an in-situ CCD memory with 305 elements, which enables capture of 1,220 (4 x 305) consecutive images at 50 Mfps. The CCD memory is folded and looped with the first element connected to the last element, which also makes possible the in-pixel signal accumulation. The sensor is a small test sensor with 32 x 32 pixels. The target applications are imaging TOF MS, pulse neutron tomography and dynamic PSP. The paper also briefly explains an expression of the temporal resolution of silicon image sensors theoretically derived by the authors in 2017. It is shown that the image sensor designed based on the theoretical analysis achieves imaging of consecutive frames at the frame interval of 50 ps.
Both ESA and the EC have identified the need for a supply chain of CMOS imagers for space applications which uses solely European sources. An essential requirement on this supply chain is the platformization of the process modules, in particular when it comes to very specific processing steps, such as those required for the manufacturing of backside illuminated image sensors. This is the goal of the European (EC/FP7/SPACE) funded project EUROCIS. All EUROCIS partners have excellent know-how and track record in the expertise fields required. Imec has been leading the imager chip design and the front side and backside processing. LASSE, as a major player in the laser annealing supplier sector, has been focusing on the optimization of the process related to the backside passivation of the image sensors. TNO, known worldwide as a top developer of instruments for scientific research, including space research and sensors for satellites, has contributed in the domain of optical layers for space instruments and optimized antireflective coatings. Finally, Selex ES, as a world-wide leader for manufacturing instruments with expertise in various space missions and programs, has defined the image sensor specifications and is taking care of the final device characterization. In this paper, an overview of the process flow, the results on test structures and imagers processed using this platform will be presented.
Europe has currently no full supply chain of CMOS image sensors (CIS) for space use, certainly not in terms of image sensor manufacturing. Although a few commercial foundries in Europe manufacture CMOS image sensors for consumer and automotive applications, they are typically not interested in adapting their process flow to meet high-end performance specifications, mainly because the expected manufacturing volume for space imagers is extremely low.
This paper reports on a Time Delay and Integration image sensor System-on-Chip realized in an embedded CCD process. The integration of single-poly CCD modules into a standard 0.13?m CMOS process is discussed. The technology performance has been evaluated using dedicated test structures. Next, a prototype TDI imager with 5?m pixel pitch, 512 rows and 1024 columns was designed, manufactured and characterized. Charge Transfer Efficiency greater than 0.9999 up till very high line rates of 400kHz was recorded.
Backside illuminated (BSI) hybrid CMOS image sensors possessing excellent spectral response
(> 80% between 400nm-800nm) have been previously reported by us. Particularly challenging with BSI imagers is to
combine such sensitivity, with low electrical inter-pixel crosstalk (or charge-dispersion). Employing thick bulk silicon
(in BSI) to maximize red response results in large crosstalk especially for blue light. In the second generation of these
imagers, we undertook the exercise of solving the crosstalk problem by a two-pronged approach: a) an optimized
epitaxial substrate that was engineered to maximize the internal electric field b) high aspect ratio trenches (30 μm deep)
with carefully tailored sidewall passivation. The results show that the proposed optimizations are effective in curtailing
crosstalk without having a major impact on other sensor parameters.
Photodetectors designed for the Extreme Ultraviolet (EUV) range with the Aluminum Gallium Nitride
(AlGaN) active layer are reported. AlGaN layers were grown by Molecular Beam Epitaxy (MBE) on
Si(111) wafers. Different device structures were designed and fabricated, including single pixel
detectors and 2D detector arrays. Sensitivity in different configurations was demonstrated, including
front- and backside illumination. The latter was possible after integration of the detector chips with
dedicated Si-based readouts using high-density In bump arrays and flip-chip bonding. In order to avoid
radiation absorption in silicon, the substrate was removed, leaving a submicron-thin membrane of
AlGaN active layer suspended on top of an array of In bumps. Optoelectrical characterization was
performed using different UV light sources, also in the synchrotron beamlines providing radiation
down to the EUV range. The measured cut-off wavelength of the active layer used was 280 nm, with a
rejection ratio of the visible radiation above 3 orders of magnitude. Spectral responsivity and quantum
We report on the fabrication and characterization of solar blind Metal-Semiconductor-Metal (MSM) based
photodetectors for use in the extreme ultraviolet (EUV) wavelength range. The devices were fabricated in the AlGaN-on-
Si material system, with Aluminum Gallium Nitride (AlGaN) epitaxial layers grown on Si(111) by means of Molecular
Beam Epitaxy. The detectors' IV characteristics and photoresponse were measured between 200 and 400 nm. Spectral
responsivity was calculated for comparison with the state-of-the-art ultraviolet photodetectors. It reaches the order of 0.1
A/W at the cut-off wavelength of 360 nm, for devices with Au fingers of 3 μm width and spacing of 3 μm. The rejection
ratio of visible radiation (400 nm) was more than 3 orders of magnitude. In the additional post-processing step, the Si
substrate was removed locally under the active area of the MSM photodetectors using SF6-based Reactive Ion Etching
(RIE). In such scheme, the backside illumination is allowed and there is no shadowing of the active layer by the metal
electrodes, which is advantageous for the EUV sensitivity. Completed devices were assembled and wire-bonded in
customized TO-8 packages with an opening. The sensitivity at EUV was verified at the wavelengths of 30.4 and 58.4 nm
using a He-based beamline. AlGaN photodetectors are a promising alternative for highly demanding applications such as
space science or modern EUV lithography. The backside illumination approach is suited in particular for large, 2D focal
Two types of backside illuminated CMOS Active Pixel Detectors--optimized for space-borne imaging--have been
successfully developed: monolithic and hybrid. The monolithic device is made out of CMOS imager wafers postprocessed
to enable backside illumination. The hybrid device consists of a backside thinned and illuminated diode array,
hybridized on top of an unthinned CMOS read-out. Using IMEC's innovative techniques and capabilities, 2-D arrays
with a pitch of 22.5 μm have been realized. Both the hybrid and well as the monolithic APS exhibit high pixel yield, high
quantum efficiency (QE), and low dark current. Cross-talk can be reduced to zero in the hybrid sensors utilizing special
structures: deep-isolating trenches. These trenches physically separate the pixels and curtail cross-talk. The hybrid
imagers are suitable candidates for advanced "smart" sensors envisioned to be realized as multi-layer 3D integrated
systems. The design of both these types of detectors, the key technology steps, the results of the radiometric
characterization as well as the intended future developments will be discussed in this paper.
We report on the results of fabrication and optoelectrical characterization of Gallium Nitride (GaN) based Extreme
UltraViolet (EUV) photodetectors. Our devices were Schottky photodiodes with a finger-shaped rectifying contact,
allowing better penetration of light into the active region. GaN layers were epitaxially grown on Silicon (111) by Metal-
Organic-Chemical Vapor Deposition (MOCVD). Spectral responsivity measurements in the Near UltraViolet (NUV)
wavelength range (200-400 nm) were performed to verify the solar blindness of the photodetectors. After that the
devices were exposed to the EUV focused beam of 13.5 nm wavelength using table-top EUV setup. Radiation hardness
was tested up to a dose of 3.3·1019 photons/cm2. Stability of the quantum efficiency was compared to the one measured
in the same way for a commercially available silicon based photodiode. Superior behavior of GaN devices was observed
at the wavelength of 13.5 nm.
We report first results of laboratory tests of Si:As
blocked-impurity-band (BIB) mid-infrared (4 to 28 μm) detectors developed
by IMEC. These prototypes feature 88 pixels hybridized on an integrated cryogenic readout electronics (CRE). They
were developed as part of a technology demonstration program for the future Darwin mission. In order to be able to separate
detector and readout effects, a custom build TIA circuitry was used to characterize additional single pixel detectors.
We used a newly designed test setup at the MPIA to determine the relative spectral response, the quantum efficiency, and
the dark current. All these properties were measured as a function of operating temperature and detector bias. In addition
the effects of ionizing radiation on the detector were studied. For determining the relative spectral response we used a dualgrating
monochromator and a bolometer with known response that was operated in parallel to the Si:As detectors. The
quantum efficiency was measured by using a custom-build high-precision vacuum black body together with cold (T ~ 4K)
filters of known (measured) transmission.
This paper reports on the fabrication and characterization of a linear array of Blocked Impurity Band (BIB) far infrared detectors and of the related Cryogenic Readout Electronics (CRE). It is part of the ESA DARWIN project which aims at the study of exoplanets by means of null interferometry and requires high performance infrared detector arrays in the 6 18μm range. Si:As BIB detectors have been fabricated on an infrared transparent Silicon substrate enabling backside illumination. The buried contact, the active and the blocking layers are deposited by epitaxy; the doping profile is controlled by adjusting the growth parameters. Access to the buried contact is provided by anisotropic silicon etch of V-grooves in the epi layers. Spray coating of photoresist is used for the lithography of the wafers with high topography. The CRE is composed of an input stage based on an integrating amplifier in AC coupled feedback with selectable integrator capacitors, of a sample and hold stage which provides isolation between input and sampling capacitance, and of an output buffer with multiplexing switch. The readout is optimized for low noise with minimum operating temperature of 4K. Linear arrays made of 42 and 88 detectors and having 30μm pixel pitch with various active areas are fabricated. Detector arrays are coupled to the CRE by Indium bumps using flip-chip technology. Measurements on the readout show reduced noise, good linearity and dynamic range. First detector characterization results are presented.
Zero-level packaging, i.e. the encapsulation of the MEMS device at wafer level, is an essential technique for MEMS miniaturization and cost reduction. A large number of different capping and sealing materials and techniques can be used. However, the testing and qualification of this type of packaging of MEMS devices requires special techniques. A number of conventional and new characterization techniques for mechanical and hermeticity testing are presented, as well as an overview about outgasing measurements and reliability testing.
The ultra-high density hybrid flip chip integration of an array of detectors and its dedicated readout electronics can be achieved with a variety of solder bump techniques such as pure Indium of Tin alloys, (In, Ni/PbSn), but also conducting polymers, etc. Particularly for cooled applications or ultra-high density applications, Indium solder bump technology (electroplated or evaporated) is the method of choice. The state-of-the-art of solder bump technologies that are to a high degree independent of the underlying detector material will be presented and examples of interconnect densities between 5e4/cm2 and 1e6/cm2 will be demonstrated.
For several classes of detectors, flip-chip integration is not allowed since the detectors have to be illuminated from the top. This applies to image sensors for EUV applications such as GaN/AlGaN based detectors and to MEMS-based detectors. In such cases, the only viable interconnection method has to be through the (thinned) detector wafer followed by a based-based integration. The approaches for dense and ultra-dense through-the-wafer interconnect "vias" will be presented.
The state-of-the-art characteristics of polycrystalline SiGe microbolometer arrays are reported. An NETD of 100 mK at a time constant of 25 ms is achievable on 14×14 and 200×1 arrays at the system level. It is the result of joint studies targeted at 1/f noise decrease, as well as TCR and uniformity improvements together with the design optimization. Thanks to successful decrease of 1/f noise of SiGe, the arrays were moved from "1/f-noise limited" to "system limited," i.e. to the case of VOx arrays. The mechanical design of pixels was improved affording very precise tuning of the infrared quarter-wave resonant cavity. The resistance and TCR non-uniformity with σ/μ better than 0.2% combined with about 1% noise nonuniformity and 100% pixel operability are demonstrated. The first lots of arrays with 99.98% production pixel yield have already been characterized and the results are being reported.
The state-of-the-art characteristics of micromachined polycrystalline SiGe microbolometer arrays are reported. An average NETD of 85 mK at a time constant of 14 ms is already achievable on typical self-supported 50 μm pixels in a linear 64-element array. In order to reach these values, the design optimization was performed based on the performance characteristics of linear 32-, 64- and 128-element arrays of 50-, 60- and 75-μm-pixel bolometers on several detector lots. The infrared and thermal modeling accounting for the read-out properties and self-heating effect in bolometers resulted in improved designs and competitive NETD values of 80 mK on 50 μm pixels in a 160x128 format at standard frame rates and f-number of 1. In parallel, the TCR-to-1/f noise ratio and the mechanical design of the pixels were improved making poly-SiGe a good candidate for a low-cost uncooled thermal array. The technological CMOS-based process possesses an attractive balance between characteristics and price, and allows the micromachining of thin structures, less than 0.2 μm. The resistance and TCR non-uniformity with σ/μ better than 0.2% combined with 99.93% yield are demonstrated. The first lots of fully processed linear arrays have already come from the IMEC process line and the results of characterization are presented. Next year, the first linear and small 2D arrays will be introduced on the market.
The performance characteristics of polycrystalline SiGe microbolometer arrays are the subject of both design and technological optimizations performed in this work to move the arrays towards the production. An NETD of 90 mK at a time constant of 11 ms is already achievable for the best non-optimized 60 micrometers pixel, 0.26 micrometers thick bolometer design in a linear 128 pixel array according to the results of LWIR characterization. The performance of linear 32, 64 and 128 element arrays of 50-, 60- and 75-micrometers pixel bolometers made with 0.26...0.13 micrometers thin poly-SiGe on several wafer runs was the starting point for the computer simulation of detector features and evolution of its characteristics under reading bias pulses. The material properties and parameters of read-outs are taken into account in the optimization of the design parameters of arrays as well. The typical bolometer characteristics achieved on the latest wafer run if processed with the PC-program accounting for the read-out and heating effects, result in an average NETD of 70 mK at a time constant of 17 ms for 50 micrometers pixels in a 320x240 array. Despite less TCR-to-1/f noise ratio as compared with VOx arrays, the several advantages make poly-SiGe a very attractive candidate for an uncooled array, i.e. full compatibility with CMOS technology, better characteristics/price ratio, resistance nonuniformity s/mean <0.2%, and a possibility to release extra-thin structures.
Extremely thin (50-100nm) polycrystalline silicon germanium (poly SiGe) microbolometers have been realized thanks to structural stiffness enhancement techniques within the pixel and the support legs. The technique involves the definition of U-shaped profiles using surface micromachining. This approach allows to decouple thermal isolation to some extent from thermal time constant. The result is a faster yet sensitive microbolometer compared to its thicker counterparts. Thermal time constants between 5 and 10 ms are achieved in vacuum yet the thermal conductance of the support legs is as low as the radiation limit (3x10-8 W/K). Apart from the (CMOS compatible) absorber definition and the release of the sacrificial oxide layer, the microbolometer process runs in a 8' Si CMOS pilot line and uses deep submicron stepper capability of the pilot line. The release process using vapor HF does not attack pixel, absorber or metal interconnect and leads to a yield close to or equal to 100%. Linear arrays and small 2D arrays of such microbolometers are demonstrated. To protect the bolometers in an early stage of the packaging, a zero-level (on-chip) flip-chip package based on indent-reflow sealing has been developed. The germanium window material is processed using process steps from multi-chip-module technology.
Infrared detector arrays can be divided in two distinct classes: hybrid (and typically photon) detectors and monolithic (and generally thermal) detectors. Hybrid detectors involve flip-chip integration of the detector array and the readout chip, require cooling and thus cause substantial system cost. Monolithic detectors do not suffer this system overhead and most notably the microbolometer thermal detectors allow ambient operating temperature. IMEC focuses on III-V (InGaAs, InAs and InAsSb) short-wave and mid-infrared detector arrays for hybrid integration on one side and surface micromachined uncooled polySiGe microbolometer arrays on the other hand. Progress in both types of detector systems is reported.
12 An IR sensor based on a linear array of poly Si-Ge bolometers is presented. The bolometers are surface micromachined devices employing a suspended structure to achieve thermal insulation from the substrate. Linear arrays of 64 elements have been connected to the readout chip by means of a ceramic substrate realizing a hybrid sensor. The CMOS readout chip provides a pulsed bias for the bolometers, amplification of the signal and multiplexes the output in an analog line. At room temperature an NETD of 300mK has been achieved, while the maximum readout speed is 1kHz.
In this work the etching of different Si-oxide, Si-nitride and metal layers in HF:H2O 24.5:75.5, BHF:glycerol 2:1 and vapor HF is studied and compared. The vapor HF etching is done in a commercially available system for wafer cleaning, that was adapted according to custom specifications to enable stiction-free surface micro- machining. The etch rates as a function of etching method, time and temperature are determined. Moreover, the influence of internal and external parameters on the HF vapor etching process are analyzed before choosing the standard HF vapor etch technique used for comparing the etching behavior of the different films.
Polycrystalline Silicon Germanium is a useful material for CMOS compatible uncooled IR bolometer manufacturing due to its excellent material characteristics such as low stress and high TCR. However, for IR imaging applications, fast and yet sensitive detectors are required. We managed to combine these two contrasting characteristics by fabricating very thin devices. This was only possible thanks to a new release technique based on vapor HF at elevated wafer temperatures, and to structural stiffness enhancement of the devices by applying U-profiles. Furthermore, a performant and low cost on-chip vacuum package has been developed. The combination of these features is applied in linear arrays of bolometers which are read-out by a dedicated noise reduction circuit using an MCM board.
In this work we demonstrate the advantages of using polycrystalline silicon germanium (poly SiGe) as a structural material for surface micromachined devices, and more specifically uncooled Infra-Red (IR) microbolometers. The low stress and the low thermal conductivity of poly SiGe enable the realization of IR microbolometers having an effective detectivity above 2 X 109 cm.Hz1/2/W. Currently, linear arrays of optimized devices included in an on-chip vacuum package are developed. The vapor HF sacrificial etching technique is used to release extremely thin microbolometers with high yield. Combined with the practical advantage of an uncooled system, a low-cost yet sensitive sensor system is the result. Possible applications include space based pushbroom earth sensing, spectral environmental monitoring and process control.
We present a new material for highly resistive heaters: thin Ti/TiN layers. Their resistivity is indeed comparable to the resistivity of NiCr, i.e. 50-100 micro-Ohn-cm. However, as opposed to the latter material, Ti/TiN is CMOS compatible and thus easier to incorporate in CMOS integrated MEMS processing. To test the reliability of thin Ti/TiN resistive heaters, both 5 nm Ti/30 nm TiN and 5 nm Ti/60 nm TiN heaters were fabricated. A thermal analysis shows a small temperature coefficient of resistivity. To test the reliability of such heaters at temperatures up to 300 degrees C, 1 micron wide Ti/TiN lines were biased using high currents. Both DC and pulsed DC current stressing resulted in very small deviations from the initial resistance for sintered and passivated heaters. The temperature uniformity over the heater line is investigated using Emission Microscopy.