In this paper, we are proposing different techniques to enhance the printability of 2D shapes at 3nm node of Block/Cut shapes in self-Aligned Multi-patterning approaches. Multiple directions such as OPC optimization, fragmentation optimization, tagging, optimization of 2D shapes dimensions, controlling the direction of movement of OPC mask edges, using skew edges and more approaches are used to meet the printability specs of 3 nm node. In addition, a complete study to define the best dimensions to 2D junction of block/cut shape and its distance from metal line has been conducted. The results are evaluated based on the resulted EPE and PVBand. We managed to reach EPE< 1nm and PVBand < 3nm (IMEC specs at 3nm node).
In this work we are introducing a manufacturing flow for the SALELE Process in details. Starting with layout decomposition, where the drawn layer is decomposed into 4 Masks: 2 Metal-like Masks, and 2 Block-like Masks. Then each of these masks is subjected to Optical Proximity Correction (OPC) process, and here we explain more about the OPC recipe development for each mask. Then we introduce a verification flow that performs two levels of verifications: (a) Litho verification, where the litho fidelity of each mask is quantified based on image quality measurements. (b) Final Manufactured shapes verification vs. expected output. This work has been carried out on an N3 candidate layout designed by IMEC.
Self-Aligned-Multi-Pattering (SAMP) played an important role in extending Moore’s law over the past years especially in advanced technology nodes beyond 20nm. SAMP was tackled using several approaches, the main and most commonly used approaches are SADP with Spacer-Is-Mask (SIM) and SADP with Spacer-Is-Dielectric (SID). The first approach SADP-SIM is most commonly used in devices layer with unidirectional lines. The second approach SADP-SID is now a common approach applied in metal layers with thigh pitches especially in 7nm and 5nm technologies where the original target patterns are decomposed into a Mandrel mask and Cut Mask. The Mandrel mask is printed first using DUV 193i lithography process, then side walls are grown on both sides of the printed Mandrel patterns, and then a Cut/Block mask is printed to define target’s intended tip-to-tip spacing. The summation of side walls and Cut/Blocks act as an etchblocking layer to the regions they are covering, in another words, trenches are grown in all areas that are not covered by side walls nor cut/blocks. A complementary process for SADP-SID is the filling process, where unidirectional design, consists of aligned target patterns, are accommodated into aligned tracks. The aligned tracks are alternately assigned as Mandrel and non-Mandrels tracks. The Cut/Block defines a gap within the target and accordingly define target’s tip-totip spacing. The spacing constraints between target’s line ends and tip-to-tip spacing are translated into spacing constrains between Cut/Blocks, and based on place and route style, the density of Cut/Blocks mask is defined. Usually, in real-life designs Cut/Blocks mask density is high and comes with tight spacing constrains. The challenge with printing a cut/Blocks mask with such tight constraints and spacing rules among Cut/Blocks shapes, mandated LEn Cut/Blocks Masks with 2, 3 and sometimes 4 masks, based on how close are the cut shapes to each other. Recently, a Selective- Etching SADP-SID approach was introduced in advanced nodes, where Cut/Blocks are divided into two types, Mandrel Cut/Blocks that cut only Mandrel tracks, and non-Mandrel Cut/Blocks that cut only non-Mandrel tracks, and hence these two cut/Blocks masks can overlap each other and this significantly mitigates spacing constrains between the two Cut/Block masks.
In this work we present a comparison between manufacturing flows of traditional approach SADP-SID and Selective- Etching SADP-SID, and how can the process definition of each approach affects spacing constraints between Cut/Blocks patterns, OPC masks, and accordingly, affect the final manufactured patterns quality quantified based on Edge- Placement-Error (EPE) and Process Variation Band (PVBand).
The 5nm technology node introduces more aggressive geometries than previous nodes. In this paper, we are introducing a comprehensive study to examine the pattering limits of EUV at 0.33NA. The study is divided into two main approaches: (A) Exploring pattering limits of Single Exposure EUV Cut/Block mask in Self-Aligned-Multi-Patterning (SAMP) process, and (B) Exploring the pattering limits of a Single Exposure EUV printing of metal Layers.
The printability of the resulted OPC masks is checked through a model based manufacturing flow for the two pattering approaches. The final manufactured patterns are quantified by Edge Placement Error (EPE), Process Variation Band (PVBand), soft/hard bridging and pinching, Image Log Slope (ILS) and Common Depth of Focus (CDOF)
Printing cut mask in SAMP (Self Aligned Multi Patterning) is very challenging at advanced nodes. One of the proposed solutions is to print the cut shapes selectively. Which means the design is decomposed into mandrel tracks, Mandrel cuts and non-Mandrel cuts. The mandrel and non-Mandrel cuts are mutually independent which results in relaxing spacing constrains and as a consequence more dense metal lines. In this paper, we proposed the manufacturing flow of selective etching process. The results are quantified in terms of measuring PVBand, EPE and the number of hard bridging and pinching across the layout.
For years, Moore’s law keeps driving the semiconductors industry towards smaller dimensions and higher density chips with more devices. Earlier, the correlation between exposure source’s wave length and the smallest resolvable dimension, mandated the usage of Deep Ultra-Violent (DUV) optical lithography system which has been used for decades to sustain Moore’s law, especially when immersion lithography was introduced with 193nm ArF laser sources. As dimensions of devices get smaller beyond Deep Ultra-Violent (DUV) optical resolution limits, the need for Extremely Ultra-Violent (EUV) optical lithography systems was a must. However, EUV systems were still under development at that time for the mass-production in semiconductors industry. Theretofore, Multi-Patterning (MP) technologies was introduced to swirl about DUV optical lithography limitations in advanced nodes beyond minimum dimension (CD) of 20nm. MP can be classified into two main categories; the first one is to split the target itself across multiple masks that give the original target patterns when they are printed. This category includes Double, Triple and Quadruple patterning (DP, TP, and QP). The second category is the Self-Aligned Patterning (SAP) where the target is divided into Mandrel patterns and non-Mandrel patterns. The Mandrel patterns get printed first, then a self-aligned sidewalls are grown around these printed patterns drawing the other non-Mandrel targets, afterword, a cut mask(s) is used to define target’s line-ends. This approach contains Self-Aligned-Double Pattering (SADP) and Self-Aligned- Quadruple-Pattering (SAQP). DUV and MP along together paved the way for the industry down to 7nm. However, with the start of development at the 5nm node and the readiness of EUV, the differentiation question is aroused again, which pattering approach should be selected, direct printing using EUV or DUV with MP, or a hybrid flow that contains both DUV-MP and EUV.
In this work we are comparing two potential pattering techniques for Back End Of Line (BEOL) metal layers in the 5nm technology node, the first technique is Single Exposure EUV (SE-EUV) with a Direct Patterning EUV lithography process, and the second one is Self-Aligned Quadruple Patterning (SAQP) with a hybrid lithography processes, where the drawn metal target layer is decomposed into a Mandrel mask and Blocks/Cut mask, Mandrel mask is printed using DUV 193i lithography process, while Block/Cut Mask is printed using SE-EUV lithography process. The pros and cons of each technique are quantified based on Edge-Placement-Error (EPE) and Process Variation Band (PVBand) measured at 1D and 2D edges. The layout used in this comparison is a candidate layout for Foundries 5nm process node.
Plasmonic grating structures can be used in many applications such as nanolithography and optical trapping. In this paper, we used plasmonic grating as optical tweezers to trap and manipulate dielectric nano-particles. Different plasmonic grating structures with single, double, and triple slits have been investigated and analyzed. The three configurations are optimized and compared to find the best candidate to trap and manipulate nanoparticles. The three optimized structures results in capability to super focusing and beaming the light effectively beyond the diffraction limit. A high transverse gradient optical force is obtained using the triple slit configuration that managed to significantly enhance the field and its gradient. Therefore, it has been chosen as an efficient optical tweezers. This structure managed to trap sub10nm particles efficiently. The resultant 50KT potential well traps the nano particles stably. The proposed structure is used also to manipulate the nano-particles by simply changing the angle of the incident light. We managed to control the movement of nano particle over an area of (5μm x 5μm) precisely. The proposed structure has the advantage of trapping and manipulating the particles outside the structure (not inside the structure such as the most proposed optical tweezers). As a result, it can be used in many applications such as drug delivery and biomedical analysis.
Self-Aligned-Double-Patterning (SADP) is a potential technology for metal layers in N10 and beyond nodes. SADP manufacturing process comes with lots of challenges. Several approaches were introduced to manufacture SADP. The most major SADP manufacturing approach is the Spacer-Is-Dielectric (SID). One of the main advantages of SADP over Litho-Etch-Litho-Etch (LELE) Double Patterning (DP) is better Mask Overlay Control. In addition, SADP results in better process tolerance and lower Line-Width Roughness. In this paper, we propose a model-based manufacturing flow for SID-SADP approach. The flow includes: (1) SADP Patterns Decomposition, (2) Etch Retargeting, (3) Sub Resolution Assist Features (SRAF) Insertion, (4) Optical Proximity Correction (OPC) process, and finally (5) Verification. The motivation beyond developing this flow is to find the least number of needed masks to achieve satisfactory imaging quality, and to characterize possible challenges in each step of the flow. Consequently, we highlight the challenges and the proposed techniques we examined to meet this objective.
Efficient, easy and accurate tuning techniques to a plasmonic nano-filter are investigated. The proposed filter supports both blue and red shift in the resonance wavelength. By varying the refractive index with a very small change (in the order of 10-3), the resonance wavelength can be controlled efficiently. Using Pockels material, an electrical tuning to the response of the filter is demonstrated. In addition, the behavior of the proposed filter can be controlled optically using Kerr material. A new approach of multi-stage electro-optic controlling is introduced. By cascading two stages and filling the first stage with pockels material and the second stage with kerr material, the output response of the second stage can be controlled by controlling the output response of the first stage electrically. Due to the sharp response of the proposed filter, 60nm shift in the resonance wavelength per 10 voltages is achieved. This nano-filter has compact size, low loss, sharp response and wide range of tunabilty which is highly demandable in many biological and sensing applications.
An analytical model to the modal characteristics of Metal-Insulator-Metal (MIM) plasmonic waveguide is
proposed. An expression to the propagation constant and losses as function in the refractive index, the
waveguide width, and the wavelength is obtained and verified using finite difference based mode-solver. These
expressions are used to develop a theoretical model to the behavior of a plasmonic nano-filter based MIM
configuration. The proposed model shows a good agreement with FDTD simulations. Using this model, the
sensitivity of the filter to different design parameters is investigated and analyzed analytically. Therefore, the
optimum values of different design parameters can be obtained analytically. By using this theoretical model, a
sharp resonance filter with narrow bandwidth, compact size, low loss, and good sensing characteristics can be
demonstrated. The proposed filter can be used in different applications such as, biological sensing and
A sharp resonance, narrow bandwidth plasmonic cascaded nanofilter is proposed. The resonator is based on Metal-
Insulator-Metal (MIM) plasmonic waveguide which has the ability to confine light at sub-wavelength scale. The
proposed inline resonator features low loss, compact size, and good sensing characteristics which opens the door for
many nanophotonic applications. This structure can be used in many applications such as sensing, biomedical
diagnostics and on-chip optical interconnects. For example, it can be used as a highly effective integrated sensor with
sensitivity up to 3000 nm RIU-1.