Proceedings Article | 8 November 2012
KEYWORDS: Photomasks, Electronic design automation, Semiconducting wafers, Manufacturing, Optical proximity correction, Process control, Lithography, Wafer-level optics, Image processing, Data processing
Mask Design, or the process of assembling, arranging and configuring the pattern data required to make a photomask, has many characteristics that make it appropriate for automation, including a high order of complexity, many steps in the process flow, many parameters to define, and multiple flow variants. Traditionally Mask Design has been performed in several discrete steps, each having its own set of tools, processes, data formats, and parameter sets. These include, for example, Boolean layer extraction, fill pattern generation, biasing, Optical Process Compensation (OPC), frame generation (assembling the patterns relevant to reticle and wafer alignment, automated bar code identification, masking/taping borders, process control monitors and test patterns); fracture (transforming design data formats into mask write tool formats); jobdeck generation (creating the mask write tool instruction set); and Mask Rule Checking (MRC). These separate, and often non-compatible, process flows make integration challenging. Additionally, the frame generation process typically has evolved in complexity ad hoc and is often not performed in a systematic manner that makes it easily adaptable to automation.
