Mr. Robert L. Jones Profile

Robert L. Jones

Research Scientist

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Proceedings Article | 26 June 2003 Paper

Theoretical corner rounding analysis and mask writer simulation

Robert Jones, Jeffrey Byers

Proceedings Volume 5040, (2003) https://doi.org/10.1117/12.485538

KEYWORDS: Photomasks, Diffusion, Lithography, Scanning electron microscopy, Reticles, Imaging systems, Process modeling, Convolution, Computer simulations, Data modeling

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We present a derivation of a theoretical corner radius function describing analytically the corner shape and curvature as a function of position on along the feature profile. This function allows us to better describe corner rounding and the process influence (imaging, diffusion, etc.) responsible for corner rounding in mask writing and lithographic imaging. When extracting a corner radius from a feature profile shape, two approaches have been used. The first assumes a single corner radius for the entire profile shape. The profile shape is fit to a single circular function to obtain the corner radius. However because the curvature is not constant the corner radius value thus obtained is contaminated by values not part of the actual corner-even if the profile is data is windowed to contain only points near the corner. The second approach defines the corner radius as equal to the maximum value of the curvature in a region near the corner. This definition is very susceptible to noise in the profile (line edge roughness, etc). A better approach is to fit the profile to a theoretical curvature-verses-position function for a perfect corner imaged using a non-perfect imaging system. This theoretical curvature verses position function can be derived for simple optical imaging systems, chemical diffusion, and Gaussian laser writers. We couple this analysis with simulations of generalized mask writing processes to better understand the nature of corner rounding. The mask writing process is modeled in Fourier space as a convolution with a possibly asymmetric Gaussian kernel. Taking an isocontour of the resulting image corresponding to the desired level of bias gives quick approximate mask shape as might be obtained from a real mask writing device such as a laser writer with an asymmetric intensity profile to its beam.

Proceedings Article | 2 June 2003 Paper

Top-down versus cross-sectional SEM metrology and its impact on lithography simulation calibration

Robert Jones, Jeff Byers, Will Conley

Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.485041

KEYWORDS: Metrology, Scanning electron microscopy, Cadmium, Lithography, Data modeling, Computer simulations, Monte Carlo methods, Calibration, Shape analysis, Line scan image sensors

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Because of their high quality, repeatability, and non-destructive nature, CD-SEMs are the gold standard for metrology in the fab. Yet, there are known offsets from this metrology type compared to others. For example, there is an inherent bias in the measurements made on the top down CD-SEM relative to measurements made from cross-sections. The underlying causes for this bias are complex, and are related both to the measurement techniques used and the interpretation of the data in terms of a specific measurement model. In extracting a line width measurement from a CD-SEM line-scan, for example, the line-scan analysis algorithm interacts with the resist profile shape to produce reported CD. The influence of the resist profile shape on the CD for top down measurements will, in general, be different from the influence of profile shape on a cross-sectional measured CD. We present here a study of CD metrology made with top down CD-SEMs and the corresponding cross-sectional metrology taken from the same structures on the same wafers. The experimental data show the top-down to cross-section offsets to be small, but present over a variety of profile shapes and measurement algorithms. We then use a simple simulation of a typical CD-SEM measurement to predict the offset as a function of beam properties, material composition, and profile shape of the structures being measured. We compare our simulations with the experimental data, tuning the model to give accurate results for our test structures. In this manner, we hope to adequately predict the top-down offset and thereby eliminate it as a source of error in calibrating a lithography simulator.

Proceedings Article | 30 July 2002 Paper

Etch simulations for lithography engineers

Robert Jones, Chris Mack, Jeff Byers

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474504

KEYWORDS: Etching, Lithography, Ions, Wavefronts, Visibility, Data modeling, Silicon, Sputter deposition, Metrology, Cadmium

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We introduce the concept of etch simulations for lithography engineers. Traditional lithographic simulations begin with a design layout and model the optical and chemical processes involved in reproducing the design as a 3-dimensional photoresist pattern. What we are really after, however, is information about the pattern, as it would appear in silicon. To achieve this goal, we devise an etch algorithm whose inputs include a full lithography simulation and minimal information about an intended etch process. Namely, we take as inputs the horizontal and vertical etch rates for each material in the film stack, the angular distribution of the incoming ion flux, and possibly a fitting coefficient for physical sputtering processes. We then produce a set of output metrics -- before and after etch -- including the CD, sidewall angle, resist loss, etch depth, etc. This gives us the opportunity to look at after etch metrology as a function of traditional lithographic input variables such as focus, exposure dose, etc., and to understand the impact of lithographic changes on after etch CDs and process windows, but without being bogged down with the physical details of the etch process. This simplified approach to etch simulation yields several useful results. In this paper we present a study of the influence of the resist profile on after etch CDs; we look at process window determinations made before and after etch; and we consider OPC variations and their effects on pattern fidelity in post-etch silicon. In addition, we consider the etch module as an extension of the lithography simulator, allowing for modeling of a bilayer resist.

Proceedings Article | 22 August 2001 Paper

Metrology and analysis of two-dimensional SEM patterns

Chris Mack, Sven Jug, Rob Jones, Prasad Apte, Scott Williams, Mike Pochkowski

Proceedings Volume 4344, (2001) https://doi.org/10.1117/12.436763

KEYWORDS: Scanning electron microscopy, Image processing, Edge detection, Shape analysis, Lithography, Line edge roughness, Semiconducting wafers, Metrology, Etching, Reticles

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A variety of techniques to characterize the lithographic quality of top-down two-dimensional patterns are described. Beginning with a top-down SEM micrograph, image processing and feature edge detection are used to extract a polygon representation of the printed pattern. Analysis on the polygon yields metrics such as corner rounding radius, feature area, and line edge roughness. Comparison of two shapes (for example, actual compared to desired, mask compared to wafer, or before etch compared to after etch) produces metrics such as overlapping area and the critical shape difference. Numerous examples of the utility of this approach will be given for SEM images of masks and wafers. The result is a set of numeric metrics of two-dimensional pattern fidelity applicable to lithographic evaluation, improvement and control.

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