Proximity electron lithography (PEL) using the ultra-thin tri-layer resist system has been successfully integrated in our dual-damascene Cu/low-k interconnects technology for the 90-nm node. Critical comparison between conventional ArF lithography and PEL as to the via-chain yield for test element groups (TEGs) including approximately 2.9 million via chains was performed to demonstrate its production feasibility.
A production-compatible method for the correction of image-placement (IP) error over a 1x stencil mask as used for proximity electron lithography (PEL) has been demonstrated. The mask IP error as measured using a newly developed metrology tool was fed forward to the PEL stepper, LEEPL-3000 and corrected for via the fine deflection of the electron beam. The overlay errors with respect to the substrate patterned by the ArF scanner have decreased from 63.6/59.3 nm to 26.1/36.4 nm in the x/y directions, but they are still larger than the errors of 15.2/14.8 nm for the conventional feedback method. Therefore, some improvements in the metrology method, the mask chucking method, the mask flatness and so on are required.
The lithographic performance of the low-energy electron-beam proximity-projection lithography (LEEPL) tool is demonstrated in terms of printability and overlay accuracy to establish the feasibility of proximity electron lithography (PEL) for the 65-nm technology node. The CD uniformity of 5.8 nm is achieved for the 1× stencil mask, and the mask patterns are transferred onto chemically amplified resist layers, coupled with a conformal multilayer process with the mask-error enhancement factor of nearly unity. Meanwhile, the overlay accuracy of 27.8 nm is achieved in the context of mix and match with the ArF scanner, and it is also shown that real-time correction for chip magnification, enabled by the use of die-by-die alignment and electron beam, can further reduce the error down to 21.3 nm. On the basis of the printability of programmed defects, it is shown that the most critical challenge to be solved for the application to production is the quality assurance of masks such as defect inspection and repair.
The performance of the LEEPL production tool is discussed from the framework of the litho-and-mask concurrent development schemes to establish the feasibility of proximity electron lithography (PEL) especially for contact and via layers in the 65-nm technology node. The critical-dimension (CD) uniformity of 4.7 nm has been achieved for 90-nm contact holes over the 1x stencil mask. Thus, the mask patterns can be transferred onto the resist layer with CD errors of less than 10%, even if the mask-error enhancement factor (MEEF) of 1.6 is taken into account. The mask manufacturability is improved if the MEEF further decreases via the use of thinner resists. Meanwhile, the overlay accuracy of 21.1 nm has been achieved in mix-and-match with the ArF scanner, with the intra-field error of only 5.1 nm owing to the real-time correction for the mask distortion. Also, the conditions for splitting dense lines into two complementary portions have been determined to avoid the pattern collapse in wet-cleaning and drying processes. The critical length of 2 mm is fairly safe for 70-nm lines if the low-damage drying is employed. The inspection tool based on transmission electron images cannot detect all printable defects without further optimization, hence a future challenge.
The placement-error correction for low-energy electron-beam proximity-projection lithography (LEEPL) has been demonstrated to enable the overlay accuracy of 23 nm that meets the requirement for the 65-nm node. The overlay accuracy for LEEPL-ArF mix-and-match lithography has been analyzed, focusing separately on the intra-field error, the inter-field error, and the dynamic fluctuation over different wafers. It has been found that the intra-field error, mainly due to the distortion of a 1x stencil mask, can be effectively corrected for by using the fine deflection of the electron beam, a unique capability of the LEEPL exposure equipment. In addition, the inter-field error can be suppressed by correcting in real time for the magnification error of each chip detected by the die-by-die alignment system. The dynamic variation in the total overlay error is also small, and the overall alignment accuracy is fairly compatible with the preliminary overlay budget.
Imaging capabilities of low-energy electron-beam proximity-projection lithography (LEEPL) are discussed focusing mainly on the hole patterns for chemically amplified resist. LEEPL needs a multi-layer process with a resist layer less than 100 nm thick. To achieve the imaging performance of the 65nm node, we optimized intermediate spin-on-glass layer and top-layer resist, which were selected carefully. 80 nm hole patterns were achieved with 10% exposure latitude, and current imaging position and 45 nm node positions were investigated using σQBP. σQBP was improved from 64.5 nm to 48.9 nm.
The technological systematics for low-energy electron-beam proximity-projection lithography (LEEPL) is discussed with particular focuses on the key ingredients such as mask, resist and alignment. We have developed a mechanically rigid 1X stencil mask supported by a grid-work of struts, high-resolution chemically-amplified resists to be used for multi layer processes, and the accurate alignment method to overlay complementary split patterns. The LEEPL beta machine as combined with these techniques was successfully used to demonstrate its imaging capability for the 70 nm node.
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