The lack of defect-free EUV photomask blanks is one of the multiple challenges in the application of EUV lithography for high volume wafer manufacturing. In EUV photomask manufacturing, shifting the design before writing to avoid patterning over blank defects (pattern shift process) is one of the methods for defect mitigation. A reliable pattern shift process depends upon precise image placement during EUV mask writing. Specifically, accurate determinations of centrality, mean shift distances and residual image placement (IP) errors (3σ) are required and reports describing pattern shift processes1-8 echo this importance of accurate IP during EUV photomask writing. The pattern shift process detailed in this report improves IP accuracy for EUV photomasks aligned on fiducial marks (FM) and increases the budget of potential pattern shifts, while remaining within the mask centrality specification limits. Our process is demonstrated on EUV products where <5 nm 3σ of uncorrected IP error for aligned patterns was achieved.