At the 2010 meeting of the Defense and Security Symposia Raytheon
reported on the status of their efforts to establish a high rate uncooled
detector manufacturing capability. At that time we had just finished the transition of the 640 × 480, 25 μm product to our 200 mm wafer fab line at Freescale semiconductor and established an automated packaging and test capability.
Over the past year we have continued to build on that foundation. In this paper we will report on this year's progress in completing the transition of our 25 μm product line to Freescale semiconductor. Included will be
the 320 × 240 product transition and a summary of SPC and defectivity
data from one year's production.
Looking beyond 25 μm, we are well along in our transition of the 17 μm
product line to Freescale, with test results being available for the
640 × 480. Additionally, we will report on progress / status of the
Tailwind program, which is developing a 2048 × 1536, 17 μm uncooled
sensor. Data to be reported includes the establishment of subfield
stitching at a high rate commercial fab and the development of the
detector package and electronics.
With 17 μm transitioned to production, Raytheon has started work on the
HD LWIR program, which is laying the foundation for the next
generation of uncooled detectors by further shrinking the pixel to <17
μm. With the HD LWIR program just beginning, we will review our
development strategy and program plan.
Over the past two years Raytheon has made a major investment aimed at establishing a high volume uncooled
manufacturing capability. This effort has addressed three elements of the uncooled value stream, namely bolometer
fabrication, packaging and calibration/test.
To facilitate a low cost / high volume source of bolometers Raytheon has formed a partnership with a high volume
200mm commercial silicon wafer fabrication. Over a 12 month period Raytheon has installed 200mm VOx deposition
equipment, matched the metrology used on the Raytheon 150mm line, transferred the process flow used to fabricate
Raytheon's double layer bolometer process and qualified the product. In this paper we will review the process transfer
methodology and bolometer performance.
To reduce bolometer packaging cost and increase production rates, Raytheon has implemented an automated packaging
line. This line utilizes automated adhesive dispense, component pick and place, wire bonding and solder seal. In this
paper we will review the process flow, qualification process and line capacity
Calibration and test has traditionally been performed using a number of temperature chambers, with increased
throughput being obtained by adding more chambers. This comes at the expense of increased test labor required to feed
the chambers and an increased energy and floor space foot print. To avoid these collateral costs, Raytheon has
implemented an automated robotic calibration cell capable of performing in excess of 5,000 calibrations a month. In this
paper we will provide an overview of the calibration cell along with takt time and throughput data.
RVS has made a significant breakthrough in the development of an athermal (TECless) 640 x 480 uncooled sensor with a unit cell size of 17 μm x 17 μm, and performance approaching that of the 25μm arrays. The sensor design contains a highly productized FPA and is designed to achieve excellent sensitivity (low NETD and low spatial noise) with good dynamic range. The improved performance is achieved through bolometer structure improvements, innovative ROIC design, and flexible, low power electronics architecture.
We will show updated performance and imagery on these sensors, which is currently being measured at <50mK, f/1, 30 Hz. Pixel operability is greater than 99 % on most FPAs, and uncorrected responsivity nonuniformity is less than 3% (sigma/mean). The combination of reduced FPA pixel size and improved effective thermal sensitivity enhances performance by providing smaller, lighter-weight systems via reduced optics size. Or, alternatively, increased range via enhanced pixel resolution without increasing mass (maintaining optical size).
We will also show the advancements made in our uncooled common architecture electronics in terms of reduced power and size for man-portable and missile applications.
RVS has made a significant breakthrough in the development of a 640 x 512 uncooled array with a unit cell size of 17 μm x 17 μm, and performance approaching that of the 25μm arrays. The successful development of this array is the first step in achieving mega-pixel formats. This FPA is designed to ultimately achieve performance of (<50mK, f/1, 30 Hz) with an 8 msec time constant. The SB-400 is a highly productized ROIC and is designed to achieve very good sensitivity (low NETD and low spatial noise) and good dynamic range. The improved performance is through bolometer structure improvements and an innovative ROIC design. It also has a simple and flexible electrical interface which allows external electronics to be small, lightweight, low-cost, and low-power. Almost all adjustments can be made through the serial interface; hence there is no need for external adjustable (DAC) circuitry. The improved power supply rejection helps maintain highly stable detector and strip resistor bias voltages which helps reduce spatial noise and image artifacts.
The combination of reduced FPA pixel size and improved effective thermal sensitivity enhances weapon sight performance by providing smaller, lighter-weight sights via reduced optics size or increased range via enhanced pixel resolution without increasing mass or increased range via improved NETD (lower f/#) without increasing mass.
We will also provide an update on the enhanced performance and yield producibility of our NVESD ManTech 640 x 480 25μm arrays.
We will also show the improvement in our uncooled common architecture electronics in terms of reduced power and size for helmet and rifle mounted sensors and a variety of missile applications.
The Navy faces an ever evolving threat scenario, ranging from sub-sonic sea skimming cruise missiles to newer, unconventional threats such as that experienced by the USS Cole. Next generation naval technology development programs are developing “stealthy” ships by reducing a ships radar cross section and controlling electromagnetic emissions. To meet these threat challenges in an evolving platform environment, ONR has initiated the “Wide Aspect MWIR Array” program. In support of this program, Raytheon Vision Systems (RVS) is developing a 2560 X 512 element focal plane array, utilizing Molecular Beam Epitaxially grown HgCdTe on silicon detector technology. RVS will package this array in a sealed Dewar with a long-life cryogenic cooler, electronics, on-gimbal power conditioning and a thermal reference source. The resulting sub system will be a component in a multi camera distributed aperture situation awareness sensor, which will provide continuous surveillance of the horizon. We will report on the utilization of MWIR Molecular Beam Epitaxial HgCdTe on Silicon material for fabrication of the detector arrays. Detector arrays fabricated on HgCdTe/Si have no thermal expansion mismatch relative to the readout integrated circuits. Therefore large-area focal plane arrays (FPAs) can be developed without concern for thermal cycle reliability. In addition these devices do not require thinning or reticulation like InSb FPAs to yield the high levels of Modulation Transfer Function (MTF) required by a missile warning sensor. HgCdTe/Si wafers can be scaled up to much larger sizes than the HgCdTe/CdZnTe wafers. Four-inch-diameter HgCdTe/Si wafers are currently being produced and are significantly larger than the standard 1.7 inch x 2.6 inch HgCdTe/CdTe wafers. The use of Si substrates also enables the use of automated semiconductor fabrication equipment.
Raytheon has consolidated the products and expertise of the former Hughes Mahwah (Magnavox) and Torrance cryocooler operations to the Raytheon Infrared Operations (RIO) located in Goleta, CA (formerly SBRC). Co-location of the cryocooler operations with the detector/dewar operations yields infrared systems with reduced cost. This paper describes the current capabilities of the linear and rotary cryocooler products as well as developments underway and planned. Development goals include cost reduction, high performance while operating in extreme environmental conditions (> 90°C skin temperatures), and long life (> 20,000 hrs). Technologies developed by a Raytheon sister division for space cryocoolers are now being applied to tactical cryocoolers at RIO. Data, specifications, and a technology roadmap for the product-line cryocoolers encompassing cooling capacities including 0.2-, 0.35-, 0.75-, 1.0- and 1.75-watt ranges will be shown.
Santa Barbara Research Center, Hughes, and Hughes Technology Center have designed and built second generation readout circuits since the early 70's. This paper will discuss the evolution, problem areas, and system design drivers that drove the development of these circuits. The discussion will range from the earliest monolithic implementation of the readouts to the newer hybrid approaches which incorporate a high level of integration. Areas addressed will be the transition from NMOS or PMOS to CMOS, development of design rule's technology, yields, costs, and performance. All these topics will show how these developments affected readouts and second generation infrared sensors. We shall also speculate on the future developments in ROIC technology.
The development of the direct injection unit cell architecture with a direct readout has produced several varieties of high-performance large-area staring arrays. These arrays satisfy almost all foreseeable missile applications. The uniformity, noise, and linearity lend themselves to low-complexity, high-performance missile systems. These readout integrated circuits (ROICs) are demonstrated with InSb over a spectral band of 0.5 to 5.5 um with NE(Delta)T of 17 mK under ambient tactical and low-background space conditions. Hybridization of eighteen 128 x 128 ROICs with LWIR HgCdTe resulted in an average NE(Delta)T of 21 mK. The new EPIC substrates yielded high-performance 256 x 256 LWIR HgCdTe capable of withstanding 2000 thermal cycles. The simple interface requirements of the /ST ROIC coupled with the high yield and extremely high operability show promise for future low-cost commercial IR systems.