Optical interconnects may provide solutions to the capacity-bandwidth trade-off of recent memory interface systems. For
cost-effective optical memory interfaces, Samsung Electronics has been developing silicon photonics platforms on
memory-compatible bulk-Si 300-mm wafers. The waveguide of 0.6 dB/mm propagation loss, vertical grating coupler of
2.7 dB coupling loss, modulator of 10 Gbps speed, and Ge/Si photodiode of 12.5 Gbps bandwidth have been achieved on
the bulk-Si platform. 2x6.4 Gbps electrical driver circuits have been also fabricated using a CMOS process.
An efficient and compact method of introducing light into a magnetic recording head
for use in Heat Assisted Magnetic Recording (HAMR) is proposed. The technique uses a polymer
waveguide to source light into a novel metallic structure consisting of a sub-wavelength C-aperture
waveguide with a 90° bend and a tapered section. The structure is modeled using Finite
Difference Time Domain (FDTD) simulations and it is shown that the 90° bend allows for low loss
near-field optical access into a conventional magnetic recording head while the tapered C-waveguide
allows for maximum input coupling and a minimum spot size at the recording media.
In this study, small sized optical pickup corresponding to blu-ray disc specifications has been developed in the array using wafer level packaging technology and verified that signal balance was satisfied with specifications.
This paper addresses the design, fabrication and packaging issues of SSOP(super slim optical pickup) module using blury technology. By using blu-ray technology, which uses a 407nm LD (Laser Diode) and an objective lens having NA (Numerical Aperture) 0.85, storage devices become miniaturized but have a high capacity. The developed prototype
uses the integrated structure of a SiOB (Silicon Optical Bench) and a mirror substrate. The SiOB should be processed in order that a thin film PD(Photodiode) and interconnections, LD, Lens, QWP(Quarter Wave Plate) and HOE can be placed, and on the Silicon Substrate should Micromachined Silicon Mirror be formed. The SiOB is aligned and bonded
with the wafer on which Silicon Mirror was formed. Then, it is diced. Because it is fabricated through this order, the super slim optical pickup can be fabricated by using wafer-level process. As a final step LD on the SiOB and HOE are mounted, assembled and bonded using an active alignment. The proposed SSOP was prototyped and characterized by measuring wavefront error and detecting static focusing and tracking error signals.
Guided-wave optoelectronic clock distribution networks on multichip modules (MCMs) are designed and fabricated to meet the high-speed clocking requirements of next-generation digital systems through a realization of superior network bandwidth, low power consumption, and large fanout capabilities compared to electrical interconnect counterparts. The sixteen-fanout H-tree clock distribution networks on MCMs is demonstrated by combining silica glass waveguides and micromachined silicon microstructures. The proposed optoelectronic multichip modules (OE-MCMs) with silica glass networks can be fabricated in a CMOS compatible batch process without modifying the conventional IC fabrication facilities. The proposed OE-MCM assembly/packaging processes are simple and cost-effective by sing self-alignment silicon microstructures. The design issues of optoelectronic H-tree networks and micromachined alignment structures for assembly/packaging processes are presented and discussed to improve the overall system performance while minimizing the system cost. The silica glass clock distribution networks and mosaic silicon mirror arrays are characterized at wavelengths of 1310 nm and 1550 nm by measuring overall optical power losses and signal uniformity.
This paper addresses the design, fabrication, and packaging issues of optoelectronic clock distribution networks on multichip modules (MCM) by combining guided-wave optoelectronic interconnect, MCM packaging, and microelectromechanical system fabrication techniques. The proposed prototype employs the silica glass waveguide networks on silicon substrates and innovative I/O coupling method which utilizes the micromachined through-holes across MCM substrates and silicon mirror arrays. Microstructures for I/O coupling have been fabricated using KOH etchants at various processing conditions and the silica glass optical waveguide networks are fabricated using FHD and RIE processes. The four fanout optoelectronic clock distribution networks are prototyped and characterized by measuring the overall insertion losses and the power equalities at the fanout nodes.
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