We describe SEMATECH’s recent defect printability work categorizing native phase defects by type and dimension
using a NXE3100 EUV scanner and DPS (Defect Printability Simulator) software developed by Luminescent
Technologies. Since the critical dimension (CD) error on a wafer simulated by the DPS is strongly affected by the
multilayer (ML) geometry, it was very important to select the optimal multilayer (ML) growth model for each defect. By
investigating the CD results obtained from 27 nm HP node imaging on NXE3100 and comparing those with simulation
results, it was clear that reconstructed ML geometry generated by the AFM measurement showed much better simulation
accuracy than conformal ML geometry. In order to find a typical ML growth model to predict the best ML geometry for
a given dimension and height of defect, we calibrated a general ML growth model with AFM data and obtained ML
growth model parameters. Using the fitted ML geometry generated from ML growth model parameters, CD error for 22
nm HP node was simulated and the result showed that conformal ML geometry is good for 24 nm defect simulation
while not appropriate for 36 nm defect simulation.
We describe the printability of native phase defects categorized by type and dimension using NXE3100 EUV scanner
and DPS (Defect Printability Simulator) software developed by Luminescent Technologies. The critical dimension (CD)
error on wafers simulated by the DPS is strongly affected by the geometry of the multilayer (ML) used as an input
parameter for simulation. This finding is supported by cross section images of the ML acquired from transmission
electron microscopy (TEM) showing that the diameter of the defect and geometry of the ML are closely related.
Accordingly, the selection of the type of ML geometry seems to be important in the accuracy of defect printability
simulation. The CD error simulated from the DPS using reconstructed ML geometry shows better correspondence with
that measured on a wafer than conformal or smoothed ML geometry. The DPS software shows good simulation
performance in predicting defect printability at 27nm HP node. This is verified by wafer printing and RCWA simulation.
Amplitude defects (or absorber defects), which are located in absorber patterns or multilayer surface, can be repaired
during mask process while phase defects (or multilayer defects) cannot. Hence, inspection and handling of both defects
should be separately progressed. Defect printability study of pattern defects is very essential since it provides criteria for
mask inspection and repair. Printed defects on the wafer kill cells and reduce the device yield in wafer processing, and
thus all the printable defects have to be inspected and repaired during the mask fabrication. In this study, pattern defect
printability of the EUV mask as a function of hp nodes is verified by EUV exposure experiments. For 3x nm hp nodes,
defect printability is evaluated by NXE3100. For 2x nm hp node, since resolution of a current EUV scanner is not
enough, SEMATECH-Berkeley actinic inspection tool (AIT) as well as micro-field exposure tool (MET) in LBNL are
utilized to verify it,. Furthermore those printability results are compared with EUV simulations. As a result, we define
size of defects to be controlled in each device node.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing. Recently both blank suppliers achieved 1-digit number of defects at 60nm in
size using their M1350s. In this paper, a full field EUV mask with Teron 61X blank inspection is fabricated to see the
printability of various defects on the blank using NXE 3100. Minimum printable blank defect size is 23nm in SEVD
using real blank defect. Current defect level on blank with Teron 61X Phasur has been up to 70 in 132 X 132mm2. More
defect reduction as well as advanced blank inspection tools to capture all printable defects should be prepared for HVM.
3.6X reduction of blank defects per year is required to achieve the requirement of HVM in the application of memory
device with EUVL. Furthermore, blank defect mitigation and compensational repair techniques during mask process
needs to be developed to achieve printable defect free on the wafer.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing, yet little data is available for understanding native defects on real masks. In
this paper, a full field EUV mask is fabricated to see the printability of various defects on the mask. Programmed pit
defect shows that minimum printable size of pits could be 17 nm of SEVD from the AIT. However 23.1nm in SEVD is
printable from the EUV ADT. Defect printability and identification of its source along from blank fabrication to mask
fabrication were studied using various inspection tools. Capture ratio of smallest printable defects was improved to 80%
using optimized stack of metrical on wafer and state-of-art wafer inspection tool. Requirement of defect mitigation
technology using fiducial mark are defined.
Extreme UV (EUV)-wavelength actinic microscopy yields detailed information about EUV mask patterns, architectures, defects, and the performance of defect repair strategies without the complications of photoresist imaging.To understand the pattern measurement limits of EUV mask microscopy, we investigate the effects of shot noise on aerial image linewidth measurements in the 22- and 16-nm lithography generations. Using a simple model we probe the influence of photon shot noise on measured, apparent line roughness, and find general flux density requirements independent of the specific EUV microscope configurations. Analysis reveals the trade-offs between photon energy density, effective pixel dimension on the CCD, and image log slope (ILS). We find that shot-noise-induced linewidth roughness (LWR) varies inversely with the square root of the photon energy density and is proportional to the magnification ratio. While high magnification is necessary for adequate spatial resolution, for a given flux density, higher magnification ratios have diminishing benefits. We find that to achieve an LWR (3) value of 5% of linewidth for dense, 88-nm mask features with a 2.52 normalized ILS value (image log-slope, ILS, equal to 28.6/µm) and 13.5-nm effective pixel width (1000 × magnification ratio), a peak photon flux of approximately 1400 photons/pixel per exposure is required.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing, yet little data is available for understanding native defects on real masks. In
this paper, two EUV mask blanks with known native buried phase defects were characterized with a Lasertec M7360
(266 nm wavelength), atomic force microscope (AFM), and SEMATECH's actinic inspection tool (AIT), which is an
EUV-wavelength microscope. The results show that there are various kinds of native defects on the mask blank. Not
surprisingly, the surface height and measured EUV intensity profile of real blank defects can differ significantly from
Gaussian-shaped defects. All defects found by the M7360 were observable in the AIT, yet many do not perturb the
intensity enough to be printable in isolation. This paper shows that defects come in various sizes and types and clarifies
what must be done to learn more about real defect printability to achieve defect-free mask blanks.
EUV-wavelength actinic microscopy yields detailed information about EUV mask patterns, architectures, defects, and the performance of defect repair strategies, without the complications of photoresist imaging. The measured aerial image intensity profiles provide valuable feedback to improve mask and lithography system modeling methods.
In order to understand the photon-flux-dependent pattern measurement limits of EUV mask-imaging microscopy, we
have investigated the effects of shot noise on aerial image linewidth measurements for lines in the 22 and 16-nm
generations. Using a simple model of image formation near the resolution limit, we probe the influence of photon shot
noise on the measured, apparent line roughness. With this methodology, we arrive at general flux density requirements
independent of the specific EUV microscope configurations.
Analytical and statistical analysis of aerial image simulations in the 22 and 16-nm generations reveal the trade-offs
between photon energy density (controllable with exposure time), effective pixel dimension on the CCD (controlled by
the microscope's magnification ratio), and image log slope (ILS). We find that shot-noise-induced linewidth roughness
(LWR) varies inversely with the square root of the photon energy density, and is proportional to the imaging
magnification ratio. While high magnification is necessary for adequate spatial resolution, for a given flux density,
higher magnification ratios have diminishing benefits. With practical imaging parameters, we find that in order to
achieve an LWR (3σ) value of 5% of linewidth for dense, 88-nm mask features with 80% aerial image contrast and 13.5-nm effective pixel width (1000× magnification ratio), a peak photon flux of approximately 1400 photons per pixel per exposure is required.
Printability and inspectability of phase defects in EUVL mask originated from substrate pit were investigated. For
this purpose, PDMs with programmed pits on substrate were fabricated using different ML sources from several
suppliers. Simulations with 32-nm HP L/S show that substrate pits with below ~20 nm in depth would not be printed on
the wafer if they could be smoothed by ML process down to ~1 nm in depth on ML surface. Through the investigation of
inspectability for programmed pits, minimum pit sizes detected by KLA6xx, AIT, and M7360 depend on ML smoothing
performance. Furthermore, printability results for pit defects also correlate with smoothed pit sizes. AIT results for
patterned mask with 32-nm HP L/S represents that minimum printable size of pits could be ~28.3 nm of SEVD. In
addition, printability of pits became more printable as defocus moves to (-) directions. Consequently, printability of
phase defects strongly depends on their locations with respect to those of absorber patterns. This indicates that defect
compensation by pattern shift could be a key technique to realize zero printable phase defects in EUVL masks.
The particle removal efficiency (PRE) of cleaning processes diminishes whenever the minimum defect size for a specific
technology node becomes smaller. For the sub-22 nm half-pitch (HP) node, it was demonstrated that exposure to high
power megasonic up to 200 W/cm2 did not damage 60 nm wide TaBN absorber lines corresponding to the 16 nm HP
node on wafer. An ammonium hydroxide mixture and megasonics removes ≥50 nm SiO2 particles with a very high PRE.
A sulfuric acid hydrogen peroxide mixture (SPM) in addition to ammonium hydroxide mixture (APM) and megasonic is
required to remove ≥28 nm SiO2 particles with a high PRE. Time-of-flight secondary ion mass spectroscopy (TOFSIMS)
studies show that the presence of O2 during a vacuum ultraviolet (VUV) (λ=172 nm) surface conditioning step will result
in both surface oxidation and Ru removal, which drastically reduce extreme ultraviolet (EUV) mask life time under
multiple cleanings. New EUV mask cleaning processes show negligible or no EUV reflectivity loss and no increase in
surface roughness after up to 15 cleaning cycles. Reviewing of defect with a high current density scanning electron
microscope (SEM) drastically reduces PRE and deforms SiO2 particles. 28 nm SiO2 particles on EUV masks age very
fast and will deform over time. Care must be taken when reviewing EUV mask defects by SEM. Potentially new
particles should be identified to calibrate short wavelength inspection tools. Based on actinic image review, 50 nm SiO2
particles on top of the EUV mask will be printed on the wafer.
The impact of carbon contamination on extreme ultraviolet (EUV) masks is significant due to throughput loss and
potential effects on imaging performance. Current carbon contamination research primarily focuses on the lifetime of the
multilayer surfaces, determined by reflectivity loss and reduced throughput in EUV exposure tools. However,
contamination on patterned EUV masks can cause additional effects on absorbing features and the printed images, as
well as impacting the efficiency of cleaning process. In this work, several different techniques were used to determine
possible contamination topography. Lithographic simulations were also performed and the results compared with the
experimental data.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing, yet little data is available for understanding native defects on real masks. In
this paper, a full-field EUV mask is fabricated to investigate the printability of various defects on the mask. The
printability of defects and identification of their source from mask fabrication to handling were studied using wafer
inspection. The printable blank defect density excluding particles and patterns is 0.63/cm2. Mask inspection is shown to
have better sensitivity than wafer inspection. The sensitivity of wafer inspection must be improved using through-focus
analysis and a different wafer stack.
Extreme ultraviolet (EUV) mask blanks with embedded phase defects were inspected with a reticle actinic inspection
tool (AIT) and the Lasertec M7360. The Lasertec M7360, operated at SEMATECH's Mask Blank Development Center
(MBDC) in Albany, NY, has a sensitivity to multilayer defects down to 40~45 nm, which is not likely sufficient for
mask blank development below the 32 nm half-pitch node. Phase defect printability was simulated to calculate the
required defect sensitivity for a next generation blank inspection tool to support reticle development for the sub-32 nm
half-pitch technology node. Defect mitigation technology is proposed to take advantage of mask blanks with some
defects. This technology will reduce the cost of ownership of EUV mask blanks. This paper will also discuss the kind of
infrastructure that will be required for the development and mass production stages.
As we approach the 22nm half-pitch (hp) technology node, the industry is rapidly running out of patterning options. Of
the several lithography techniques highlighted in the International Technology Roadmap for Semiconductors (ITRS), the
leading contender for the 22nm hp insertion is extreme ultraviolet lithography (EUVL). Despite recent advances with
EUV resist and improvements in source power, achieving defect free EUV mask blank and enabling the EUV mask
infrastructure still remain critical issues. To meet the desired EUV high volume manufacturing (HVM) insertion target
date of 2013, these obstacles must be resolved on a timely bases. Many of the EUV mask related challenges remain in
the pre-competitive stage and a collaborative industry based consortia, such as SEMATECH can play an important role
to enable the EUVL landscape. SEMATECH based in Albany, NY is an international consortium representing several of
the largest manufacturers in the semiconductor market. Full members include Intel, Samsung, AMD, IBM, Panasonic,
HP, TI, UMC, CNSE (College of Nanoscience and Engineering), and Fuller Road Management. Within the
SEMATECH lithography division a major thrust is centered on enabling the EUVL ecosystem from mask development,
EUV resist development and addressing EUV manufacturability concerns. An important area of focus for the
SEMATECH mask program has been the Mask Blank Development Center (MBDC). At the MBDC key issues in EUV
blank development such as defect reduction and inspection capabilities are actively pursued together with research
partners, key suppliers and member companies. In addition the mask program continues a successful track record of
working with the mask community to manage and fund critical mask tools programs. This paper will highlight recent
status of mask projects and longer term strategic direction at the MBDC. It is important that mask technology be ready to
support pilot line development HVM by 2013. In several areas progress has been made but a continued collaborative
effort will be needed along with timely infrastructure investments to meet these challenging goals.
Using an extreme-ultraviolet (EUV) microscope to produce high-quality images of EUV reticles, we have developed a
new wavelength tuning method to acquire through-focus data series with a higher level of stability and repeatability than
was previously possible. We utilize the chromatic focal-length dependence of a diffractive Fresnel zoneplate objective
lens, and while holding the mask sample mechanically still, we tune the wavelength through a narrow range, in small
steps. In this paper, we demonstrate the method and discuss the the relative advantages that this data collection technique
affords.
Carbon contamination of extreme ultraviolet (EUV) masks and its effect on imaging is a significant issue due to lowered
throughput and potential effects on imaging performance. In this work, a series of carbon contamination experiments
were performed on a patterned EUV mask. Contaminated features were then inspected with a reticle scanning electron
microscope (SEM) and printed with the SEMATECH Berkeley Microfield-Exposure tool (MET) [1]. In addition, the
mask was analyzed using the SEMATECH Berkeley Actinic-Inspection tool (AIT) [2] to determine the effect of carbon
contamination on the absorbing features and printing performance.
To understand the contamination topography, simulations were performed based on calculated aerial images and resist
parameters. With the knowledge of the topography, simulations were then used to predict the effect of other thicknesses
of the contamination layer, as well as the imaging performance on printed features.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing. The successful production of defect-free masks will depend on the timely
development of defect inspection tools, including both mask blank inspection tools and absorber pattern inspection tools
to meet the 22 nm half-pitch node. EUV mask blanks with embedded phase defects were inspected with a reticle actinic
inspection tool (AIT) and the Lasertec M7360. The Lasertec M7360 is operated at SEMATECH's Mask blank
Development Center (MBDC) in Albany, with sensitivity to multilayer defects down to 40~45 nm, which is not likely
sufficient for mask blank development below the 32 nm half-pitch node. Phase defect printability was simulated to
calculate the required defect sensitivity for the next generation blank inspection tool to support reticle development for
the sub-32 nm half-pitch technology node. This paper will also discuss the kind of infrastructure that will be required in
the development and mass production stages.
Extreme ultraviolet (EUV) microscopy is an important tool for the investigation of the performance of EUV
masks, for detecting the presence and the characteristics of defects, and for evaluating the effectiveness of defect repair
techniques. Aerial image measurement bypasses the difficulties inherent to photoresist imaging and enables high data
collection speed and flexibility. It provides reliable and quick feedback for the development of masks and lithography
system modeling methods.
We operate the SEMATECH Berkeley Actinic Inspection Tool (AIT), a EUV microscope installed at the
Advanced Light Source at Lawrence Berkeley National Laboratory. The AIT is equipped with several highmagnification
Fresnel zoneplate lenses, with various numerical aperture values, that enable it image the reflective mask
surface with various resolution and magnification settings. Although the AIT has undergone significant recent
improvements in terms of imaging resolution and illumination uniformity, there is still room for improvement.
In the AIT, an off-axis zoneplate lens collects the light coming from the sample and an image of the sample is
projected onto an EUV-sensitive CCD camera. The simplicity of the optical system is particularly helpful considering
that the AIT alignment has to be performed every time that a sample or a zoneplate is replaced. The alignment is
sensitive to several parameters such as the lens position and orientation, the illumination direction and the sample
characteristics. Since the AIT works in high vacuum, there is no direct access to the optics or to the sample during the
alignment and the measurements. For all these reasons the alignment procedures and feedback can be complex, and in
some cases can reduce the overall data throughput of the system. In this paper we review the main strategies and
procedures that have been developed for quick and reliable alignments, and we describe the performance improvements
we have achieved, in terms of aberration magnitude reduction.
Phase-shifting EUVL masks applying thinner absorber are investigated to design optimum mask structure with less shadowing problems. Simulations using S-Litho show that H-V bias in Si capping structure is higher than that of Ru capping since the high n (= 0.999) of Si increases sensible absorber height. Phase differences obtained from the patterned masks using the EUV CSM are well-matched with the calculated values using the practical refractive index of absorber materials. Although the mask with 62.4-nm-thick absorber, among the in-house masks, shows the closest phase ΔΦ(= 176°) to the out-of-phase condition, higher NILS and contrast as well as lower H-V bias are obtained with 52.4-nm-thick absorber (ΔΦ = 151°) which has higher R/R0 ratio. MET results also show that lithography performances including MEEF, PW, and resist threshold (dose), are improved with thinner absorber structure. However, low OD in EUVL mask, especially in thinner absorber structure, results in light leakage from the neighboring exposure shots, and thus an appropriate light-shielding layer should be introduced.
A patterned TaN substrate, which is candidate for a mask absorber in extreme ultra-violet lithography (EUVL), was
etched to have inclined sidewalls by using a Faraday cage system under the condition of a 2-step process that allowed the
high etch selectivity of TaN over the resist. The sidewall angle (SWA) of the patterned substrate, which was in the shape
of a parallelogram after etching, could be controlled by changing the slope of a substrate holder that was placed in the
Faraday cage. The performance of an EUV mask, which contained the TaN absorber of an oblique pattern over the
molybdenum/silicon multi-layer, was simulated for different cases of SWA. The results indicated that the optical
properties, such as the critical dimension (CD), an offset in the CD bias between horizontal and vertical patterns (H-V
bias), and a shift in the image position on the wafer, could be controlled by changing the SWA of the absorber stack. The
simulation result showed that the effect of the SWA on the optical properties became more significant at larger
thicknesses of the absorber and smaller sizes of the target CD. Nevertheless, the contrast of the aerial images was not
significantly decreased because the shadow effect caused by either sidewall of the patterned substrate cancelled with
each other.
The SEMATECH Berkeley Actinic Inspection Tool (AIT) is an EUV zoneplate microscope dedicated to photomask
research. Recent upgrades have given the AIT imaging system selectable numerical aperture values of 0.25, 0.30, and
0.35 (4 equivalent). The highest of which provides resolution beyond the current generation of EUV lithography research
tools, giving above 75% contrast for dense-line features with 100-nm half-pitch on the mask, and above 70% for
88-nm half-pitch. To improve the imaging system alignment, we used through-focus images of small contacts to extract
aberration magnitudes and compare with modeling. The astigmatism magnitude reached a low value of 0.08 waves
RMS. We present the results of performance benchmarking and repeatability tests including contrast, and line width
measurements.
Microfield exposure tools (METs) continue to play a dominant role in the development of extreme ultraviolet (EUV)
resists. Here we present an update on the SEMATECH Berkeley 0.3-NA MET and summarize the latest test results from
high-resolution line-space and contact-hole printing. In practice, the resolution limit of contact-hole printing is generally
dominated by contact size variation that is often speculated to originate form shot noise effects. Such observations of
photon-noise limited performance are concerning because they suggest that future increased resist sensitivity would not
be feasible. Recent printing data, however, indicates that the contact size variation problem is currently not a result of
shot noise but rather attributable to the mask in combination with the resist-dominated mask error enhancement factor
(MEEF). Also discussed is the importance of the contribution of the system-level line-edge roughness (LER) to resist
LER values currently obtained with the SEMATECH Berkeley MET. We present the expected magnitude of such effects
and compare the results to observed trends in LER performance from EUV resists over the past few years.
Lifetime of EUVL masks which are intentionally contaminated with carbon is investigated by comparing Si and Ru
capping layer. Carbon deposition is observed not only on the multilayer, but also on the absorber sidewall of the mask.
Deposited carbon on the sidewall during EUV exposure gradually varies mask CD and also induces the changes in the
wafer printability and dose in the scanner. In addition, we compare the effects of carbon contamination between Si and
Ru capped blank. Ru capped blank shows longer mask mean time between cleaning (MTBC) than Si capped blank by 25% in our experiments.
The shrink of device node to 65 and 45nm node masks mask manufacturers paying their attention to repair process in
terms of mask cost efficiency. Thus, it is very important to define the repair performance accurately and introduce
adequate tools timely. Usually the repair performance has been expressed as an edge placement error, transmittance
change and quartz damage. We have used the measuring tools such as CD SEM, AFM and AIMS to measure those
factors and the 2D simulator, Solid C to predict the repair performance. In this case, 3D topographical effect is not
considered. However, the 3D topography of pattern becomes quite important for 45 nm node or less.
ArF immersion lithography is the strongest candidate for the 45 nm node. The immersion technology makes it
possible to use of hyper NA systems1. Hyper NA will increase the polarization effect of illumination source2. Therefore,
the topography of pattern is quite important with respect to the intensity and the polarization of various diffraction
orders. This paper presents repair specifications based on the Solid E 3D simulator of the 45 nm node.
As the design rule continues to shrink towards 45 nm node and beyond, the lithographers need the new technologies such as immersion lithography and EUV lithography. Also the inspection specification on the printed reticle defects is becoming even more challenging for the reticles used in both lithography methods.
The main purpose of this study is to investigate the pattern defect detection capability on EUV mask with the memory design patterns of 45 nm node and below in the DUV reticle inspection systems at our mask-shop and to compare those results with the absorber defect specification from the EUV lithography simulation in those design rules.
In addition, we investigate the inspection capability on the pattern defects with the test optical mask designed in 45 nm node and below for the immersion lithography and compare the defect detection ability on the EUV mask and the optical mask in the current DUV reticle inspection equipment.
Quartz dry etching is critical to realize the resolution enhancement technology (RET) mask, such as chromeless phase lithography (CPL) mask, alternating phase shift mask, and RIM type phase shift mask. Quartz etching is one of challenging processes in photomask manufacturing due to the absence of etch stopper. The requirements of quartz etching are sidewall angle, phase uniformity, depth linearity, and micro/macro loading effect in wide range of feature sizes. In this paper, we will discuss the improvement of quartz dry etching using Cr hardmask without any hardware modifications. We can control the tendency of phase uniformity across mask surface in convex or concave curvature with nearly vertical sidewall angle. Two-step quartz etching recipe, which consists of two kinds of sub-etching recipe, is introduced to meet the phase uniformity and quartz profile at the same time. We have optimized quartz dry etching with vertical sidewall angle, low depth uniformity, and low micro/macro loading effect.
Chromeless Phase Lithography (CPL) is one of the promising RETs for low K1 optical lithography. However, there are remained issues in CPL mask manufacturing, such as phase defect, which can be generated during quartz dry etching process. In CPL mask technology, the traditional defect printability specification is no longer adequate. This paper investigates to understand the tolerance of the CPL in view of phase defect specification. We studied to find out specifications for phase defect in CPL mask. Three-dimensional topography is used in the phase defect simulation. Based on the simulation results, programmed defect mask is made to evaluate phase defect printability by measuring aerial images with AIMS. Also the inspection sensitivity for quartz phase defect was evaluated with current inspection tool.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.