Electrostatic Discharge (ESD) events can cause irreversible damage during production, packaging and application
of Vertical-Cavity Surface Emitting Lasers (VCSELs). Experimental investigation of those damage patterns
inside a real device is a complex and expensive task. Simulation tools can provide insight into the physics during
an actual discharge event. This paper aims to analyze ESD events in VCSELs with a microscopic simulation.
With the help of a state-of-the art Technology Computer Aided Design (TCAD) virtual ESD tests are
performed on oxide-confined VCSELs. The 2-D simulation model takes into account high-field effects and
self-heating in a hydrodynamic framework that allows time-dependent spatially resolved monitoring of critical
quantities (such as electric field across the oxide, temperature profile, current densities) during the ESD events.
Human Body Model (HBM), Machine Model (MM) and Charged Device Model (CDM) show typical local
heating and current crowding effects which may lead to irreversible damaging of the device. For slow ESD events
the temperature peak is found near the center of the device. Faster pulses show maximum temperature at the
interface between oxide and aperture. Physics-based explanations in terms of local electric field, heat generation
and heat transport are given. Oxide aperture, thickness and its position relative to the intrinsic region strongly
influence self-heating, electric fields, current density profiles and the dielectric breakdown conditions. The impact
of those factors on ESD robustness are analyzed and guidelines for robust ESD design in VCSELs are presented.
Yield enhancement and reliability improvement are main requirements in todays industrial VCSEL manufacturing. This requires a thorough understanding of process tolerances and the effects resulting
from design variations. So far, this has been done by statistical
analysis of experimental data. In this work, we use a state-of-the art technology computer aided design (TCAD) tool to analyze device
reliability and yield for multiple VCSEL designs. The starting point is a physics-based simulation model that is calibrated to temperature-dependent static and dynamic measurements for a set of single- and multi-mode VCSELs lasing at 850 nm. Applying statistical variations that result from design modifications and process fluctuations, yield and reliability data are extracted by means of simulation. The yield will be derived by compliance to selected device specifications (such available single-mode power), and the device reliability is determined from an analysis of the internal device properties. As example, the oxide aperture and metal aperture design will be discussed, and a robust design will be presented.
This paper describes a complete technology family for parallel optical interconnect systems. Key features are the two-dimensional on-chip optical access and the development of a complete optical pathway. This covers both chip-to-chip links on a single boards, chip-to-chip links over an optical backpanel, and even system-to-system interconnects. Therefore it is a scalable technology. The design of all parts of the link, and the integration of parallel optical interconnect systems in the design flow of electronic systems is presented in this paper.
We are discussing design issues and measurement results for a new type of VCSEL based small form factor low cost optical front end (OFE). The optical interface of the OFE is a duplex LC receptacle. Mechanical, optical and electrical design restrictions are considered. High speed VCSEL biasing, the driver-VCSEL interface, influence of misalignment on RF performance, general requirements for serial 10Gb/s transceivers are main topics. Measurements of transmitter and receiver eye diagrams including a commercially available driver are presented.
High data-rate communication links are placing increasing demands on the performance and cost of semiconductor-laser diodes. Vertical-cavity surface-emitting lasers (VCSELs) are ideal light sources for 10 Gbit/s applications. At Avalon Photonics Ltd., high-performance multimode VCSELs and VCSEL arrays are developed and fabricated for applications in low-cost fiber-optic communication links. An overview of static and dynamic characteristics of oxide-confined 850 nm VCSELs with data rates of 10 Gbit/s is presented. These 10 Gbit/s VCSELs are developed for the next generation 10 Gigabit Ethernet standard. Results show low threshold, high temperature operation, high modulation efficiency, short rise and fall times, and well-open eye-diagrams at different temperatures. Transmission over 600 m high-bandwidth multimode fiber at 10 Gbit/s is demonstrated. Mainly due to their low noise level and high linearity, these state-of-the-art devices are also well suited for transparent fiber-optic links using subcarrier multiplexed modulation schemes. Spurious-free dynamic ranges greater than 100 dBHz2/3 are reported.
At Avalon Photonics Ltd. high-performance multimode VCSELs and VCSEL arrays are developed and fabricated for applications in low-cost fiber-optic communication links. We report on state-of-the-art oxide-confined 850 nm VCSELs for current-generation parallel optical link modules with data-rates up to 3.125 Gbit/s per channel. The high performance and high reliability of these devices is reviewed. Moreover, 10 Gbit/s VCSELs are developed for the next-generation 10-Gigabit Ethernet standard (10-GbE). Transmission over 600 m high-bandwidth multimode fiber at 10 Gbit/s is demonstrated. Mainly due to their low noise level and high linearity, these high-performance devices are also well suited for transparent fiber-optic links using subcarrier multiplexed modulation schemes in the low GHz range. Spurious-free dynamic ranges larger than 100 dBHz2/3 were measured, which is sufficient for important applications like cable television distribution and remote antenna addressing in mobile phone systems.
VCSEL arrays are attractive low-cost high-speed sources for free space and fiber coupled links. An overview of existing device types and technologies as well as trends in device technology, optical interconnect and parallel optical datacom link applications is given. We discuss applications and performance limits of 1D and 2D VCSEL arrays. At Avalon Photonics Ltd. a broad variety of devices (up to 16x16) is developed and fabricated. Top and bottom emitting arrays offer new perspectives in optical and electrical packaging and are therefore of high interest for short haul parallel optical links, board-to-board and on-board ultra high-speed optical interconnects. Bandwidth requirements are increasing rapidly. The limits of VCSEL arrays in terms of modulation speed are analyzed and RF device optimization is discussed. Device and package limitations have to be considered. Important system level implications are also pointed out. Results of selectively oxidized 850nm multi transverse mode VCSEL arrays demonstrating low threshold current, high modulation efficiency and excellent multi-gigabit performance are presented. The paper ends with a discussion of future prospects in the field.
We present an accurate experimental characterization of the dynamical properties of polarization switching (PS) in single transverse and longitudinal mode vertical-cavity surface-emitting lasers (VCSELs). When a VCSEL is driven with a constant current at its polarization switching point, it makes random jumps between its two linear polarization states. This phenomenon is called mode-hopping. The permanence times in the two polarization states show an exponentially decreasing distribution, according to Arrhenius? law. The average permanence time varies over several orders of magnitude depending on the relative difference between threshold and switching current. We have performed a statistical experimental characterization of the residence times of mode hopping VCSELs for both proton implanted and oxide confined samples, and find our results to be in excellent agreement with the theoretical predictions from a novel intensity rate equation model.
The physical limit on electronic data communication rates between silicon chips is projected to be of the order of Tbit/s over cm-scale connections. The semiconductor industry predicts that this level of i/o is likely to be required in the near future. Free-space optical connections to silicon VLSI are potentially able to offer much higher data-rates than electrical interconnects and are promising for future high-performance electronic systems. We have assembled the components of an optoelectronic 15 Gbit/s crossbar switch designed to include, internally, an optical data rate to a hybrid InGaAs/silicon chip in the Tbit/s regime. Input to the demonstrator is by an 8 X 8 VCSEL array operating at 250 Mbit/s channel, and these 64 channels are fanned out 8 X 8 times to give the high data rate onto the hybrid chip. This chip includes an array of 4096 InGaAs-based detectors flip chip bonded to silicon CMOS. The custom- designed CMOS performs packet routing under the control of an optical clock and the routed signals are output via differential modulator pairs, interlaced between the detectors on the InGaAs chip.
In this contribution, we bring forward and compare the polarization switching (PS) dynamics and the polarization modulation characteristics of gain- and index-guided VCSELs. We then discuss the steady-state and dynamic characteristics of both types of VCSELs. Finally we focus on the polarization modulation limit and the average mode hopping frequency, which both scale over 8 orders of magnitude when the switching current is varied from just above threshold up to 2 times the threshold current.