We developed silicon-on-insulator (SOI) diode-based uncooled infrared focal plane arrays (IRFPAs), in which single-crystal pn junction diodes formed in an SOI layer are used as temperature sensors. These diodes, based on silicon large-scale integration technology, offer excellent uniformity, and have led to the use of high-performance uncooled IRFPAs in a wide variety of applications. In order to extend the pitch to less than 12 μm, a scalable new pixel structure has been developed to reduce the pixel size, based on a novel thermally isolated structure, which is fabricated above a CMOS processed wafer. The pn junction diodes used as a temperature sensor are separated from the underlying substrate by supporting legs made from thin metal wire, forming a cavity. To reduce the pixel size, we are developing a new diode structure by optimizing the ion implantation condition, thinning the SOI layer, and redesigning the supporting legs, achieving a smaller pixel size even with ten serially connected diodes. We also evaluated a new readout circuit architecture that enables an increase in sensitivity by generating a larger change in the diode forward voltage at a given temperature with no change in the number of diodes in the SOI layer. The effectiveness of the proposed readout circuit architecture was verified using a fabricated test element. The sensitivity of the test element was 128% of that for existing circuit structures, and further increases are expected with circuit structure optimization. These techniques have greatly enhanced the performance of our SOI diode based uncooled IRFPAs.
In this study, we develop a shutter-less algorithm for a silicon-on-insulator (SOI) diode uncooled infrared focal plane array (IRFPA). The optimal non-uniformity correction is calculated onboard. The effectiveness of the proposed algorithm was verified using a prototype uncooled IR camera. The performance of the shutter-less algorithm was studied by measuring a fixed pattern noise (FPN) at different correction points and verification of favorable camera operation. Even at two correction points, the FPN was at a practical level. The temperature behavior of the proposed SOI diode is highly uniform and predictable, which leads to simpler device modeling and therefore simpler shutter-less operation. A new pixel structure was also developed for pixel size reduction. This approach is based on the realization of a novel thermal isolation structure that can be fabricated by post processing on top of CMOS wafers. Ten series diodes can be arranged in a pixel by designing a 12 μm pixel pitch IRFPA with the new pixel structure. These developed technologies have significantly enhanced the performance of the SOI diode uncooled IRFPA, which inherently possesses excellent uniformity and low noise.
We develop a shutter-less method for replacing mechanical shutters. To verify the effectiveness of the proposed method, we fabricated a silicon-on-insulator (SOI) diode uncooled 320 × 240 infrared focal plane array (IRFPA) with 17 μm pixel pitch utilizing a circuit architecture that achieves thermo-electric cooling (TEC)-less operation. Furthermore, we fabricated a prototype uncooled IR camera that implements the proposed method and verified favorable camera operation. The temperature behavior of our proposed SOI diode is highly uniform and predictable, which enables simpler device modeling and consequently simpler TEC-less and shutter-less operation.