Mr. Tatsuhiko Ema Profile

Tatsuhiko Ema

at Sony Semiconductor Manufacturing Co Ltd

SPIE Involvement:

Author

Publications (7)

Proceedings Article | 1 April 2009 Paper

CD and defect improvement challenges for immersion processes

Keisuke Ehara, Tatsuhiko Ema, Toshinari Yamasaki, Seiji Nakagawa, Seiji Ishitani, Akihiko Morita, Jeonghun Kim, Masashi Kanaoka, Shuichi Yasuda, Masaya Asai

Proceedings Volume 7273, 727322 (2009) https://doi.org/10.1117/12.814234

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Particles, Etching, Scanners, Scanning electron microscopy, Temperature metrology, Lithography, Silicon, Inspection

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Proceedings Article | 1 April 2009 Paper

Resist process control for 32-nm logic node and beyond with NA > 1.30 immersion exposure tool

Seiji Nagahara, Kazuhiro Takahata, Seiji Nakagawa, Takashi Murakami, Kazuhiro Takeda, Shinpei Nakamura, Makoto Ueki, Masaki Satake, Tatsuhiko Ema, Hiroharu Fujise, Hiroki Yonemitsu, Yuriko Seino, Shinichiro Nakagawa, Masafumi Asano, Yosuke Kitamura, Takayuki Uchiyama, Shoji Mimotogi, Makoto Tominaga

Proceedings Volume 7273, 72733A (2009) https://doi.org/10.1117/12.813498

KEYWORDS: Resolution enhancement technologies, Logic, Optical lithography, Line width roughness, Photoresist processing, Lithography, Photomasks, Copper, Diffusion, Logic devices

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Proceedings Article | 16 March 2009 Paper

Feasibility of ultra-low k1 lithography for 28nm CMOS node

Shoji Mimotogi, Kazuhiro Takahata, Takashi Murakami, Seiji Nagahara, Kazuhiro Takeda, Masaki Satake, Yosuke Kitamura, Tomoko Ojima, Hiroharu Fujise, Yuriko Seino, Tatsuhiko Ema, Hiroki Yonemitsu, Manabu Takakuwa, Shinichiro Nakagawa, Takuya Kono, Masafumi Asano, Suigen Kyoh, Hideaki Harakawa, Akiko Nomachi, Tatsuya Ishida, Shunsuke Hasegawa, Katsura Miyashita, Makoto Tominaga, Soichi Inoue

Proceedings Volume 7274, 72741F (2009) https://doi.org/10.1117/12.814040

KEYWORDS: Lithography, Photomasks, Lithographic illumination, Binary data, Scanners, SRAF, Logic devices, Optical lithography, Metals, Semiconductors

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Proceedings Article | 4 December 2008 Paper

Patterning performance of hyper NA immersion lithography for 32nm node logic process

Kazuhiro Takahata, Masanari Kajiwara, Yosuke Kitamura, Tomoko Ojima, Masaki Satake, Hiroharu Fujise, Yuriko Seino, Tatsuhiko Ema, Manabu Takakuwa, Shinichiro Nakagawa, Takuya Kono, Masafumi Asano, Suigen Kyo, Akiko Nomachi, Hideaki Harakawa, Tatsuya Ishida, Shunsuke Hasegawa, Katsura Miyashita, Takashi Murakami, Seiji Nagahara, Kazuhiro Takeda, Shoji Mimotogi, Soichi Inoue

Proceedings Volume 7140, 714017 (2008) https://doi.org/10.1117/12.804739

KEYWORDS: Resolution enhancement technologies, Optical lithography, Logic, Lithography, SRAF, Metals, Immersion lithography, Semiconductors, Optical proximity correction, Logic devices

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Proceedings Article | 1 April 2008 Paper

Patterning strategy and performance of 1.3NA tool for 32nm node lithography

Shoji Mimotogi, Masaki Satake, Yosuke Kitamura, Kazuhiro Takahata, Katsuyoshi Kodera, Hiroharu Fujise, Tatsuhiko Ema, Koutaro Sho, Kazutaka Ishigo, Takuya Kono, Masafumi Asano, Kenji Yoshida, Hideki Kanai, Suigen Kyoh, Hideaki Harakawa, Akiko Nomachi, Tatsuya Ishida, Katsura Miyashita, Soichi Inoue

Proceedings Volume 6924, 69240M (2008) https://doi.org/10.1117/12.772201

KEYWORDS: Lithography, Optical lithography, Scanners, SRAF, Semiconducting wafers, Lithographic illumination, Metals, Photomasks, Semiconductors, Logic devices

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Proceedings Article | 31 March 2008 Paper

Immersion resist process for 32-nm node logic devices

Tatsuhiko Ema, Koutaro Sho, Hiroki Yonemitsu, Yuriko Seino, Hiroharu Fujise, Akiko Yamada, Shoji Mimotogi, Yosuke Kitamura, Satoshi Nagai, Kotaro Fujii, Takashi Fukushima, Toshiaki Komukai, Akiko Nomachi, Tsukasa Azuma, Shinichi Ito

Proceedings Volume 6923, 69230E (2008) https://doi.org/10.1117/12.771008

KEYWORDS: Photoresist processing, Logic devices, Reflectivity, Photomasks, System on a chip, Etching, Transparency, Materials processing, Immersion lithography

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Proceedings Article | 27 March 2007 Paper

Performance of immersion lithography for 45-nm-node CMOS and ultra-high density SRAM with 0.25um2

Shoji Mimotogi, Fumikatsu Uesawa, Makoto Tominaga, Hiroharu Fujise, Koutaro Sho, Mikio Katsumata, Hiroki Hane, Atsushi Ikegami, Seiji Nagahara, Tatsuhiko Ema, Masafumi Asano, Hideki Kanai, Taiki Kimura, Masaaki Iwai

Proceedings Volume 6520, 652008 (2007) https://doi.org/10.1117/12.711049

KEYWORDS: Lithography, Immersion lithography, Photomasks, Critical dimension metrology, Phase shifting, Lithographic illumination, Phase shifts, Logic, Metals, Semiconductors

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Showing 5 of 7 publications

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