We are developing pixel-structured scintillators for the eventual purpose of high-resolution and high-sensitivity x-ray
imaging applications. The pixel-structured scintillators were fabricated by filling Gd2O2S:Tb phosphor powder into the
silicon micro-well arrays by using a simple sedimentation method. The micro-well arrays having a depth of 180 μm were
fabricated by deep reactive ion etching of silicon wafers. To enhance the optical gain and the Swank noise factor, we
applied reflectance at the inside wall surfaces. Two different
inside-surface treatments were applied; 0.2-μm-thick
titanium which has 70% reflectance and 1-μm-thick silicon dioxide which was grown by thermal oxidation. The imaging
performance was evaluated in terms of modulation-transfer function (MTF), noise-power spectrum (NPS), and detective
quantum efficiency (DQE). Compared with the commercial phosphor screen as a reference, much enhanced MTF results
were measured. However, very low values of the system gain due to trapping of the generated optical photons at the wall
surfaces give rise to the poorer DQE performance rather than that of the reference detector. The theoretical cascaded
model analysis estimates much improved DQE performances with improved design parameters, such as higher
reflectance of 90% at the wall surfaces.
A 2.5 cm by 5 cm, 512 by 1024 pixel CMOS photodiode array detector designed specifically for digital radiography will be described. All necessary scanning and readout circuitry is integrated within the detector. The small pixel spacing of 48 micrometers allows the imager to easily achieve the 10 lp/mm resolution required for the targeted interventional mammography application. Direct coupling to the scintillator and a pixel fill factor of more than 80% leads to high DQE over a large range of exposure values. The detector exhibits very low dark current of about 30 pA/cm2 at room temperature, which allows for low-noise operation and long integration times. Read noise of less than 200 electrons rms and a saturation level of 2.8 X 106 electrons combine for a large dynamic range greater than 80 dB. The conversion gain of the detector is 0.5 (mu) V/electron. Combined with a Gd2O2S scintillator, the imager achieves up to 25% MTF at 10 lp/mm and a DC detective quantum efficiency of 50%. The detector design is optimized for x-ray energies between 10 kV and 50 kV, but can be retrofitted with different scintillator screens to cover a large range of imaging applications up to 160 kV.
This paper describes a new prototype a-Si (amorphous silicon) x-ray image sensor developed at EG&G Reticon. The sensor consists of a 512 by 512 array of a-Si photodiodes placed on 100 micrometer centers. The active area measures 5 cm on a side. Each pixel is addressed by a pair of switching diodes rather than the more common TFT (thin film transistor) switch. This approach leads to a simplified all-diode design with excellent fill factor, large dynamic range and good performance. The sensor is intended primarily for high-resolution x-ray imaging applications. A scintillator in direct contact with the diode array is used to convert incident x-ray photons to visible light detectable by the a-Si photodiodes. Since the conversion takes place directly at the sensor surface, no bulky intermediate optics are needed. The entire sensor plus support electronics can be mounted in a package less than 3 cm thick. The paper describes the sensor performance in terms of dark current, image lag, sensitivity and dynamic range. The MTF of the sensor and attached scintillator is measured by exposing the device through a narrow slit illuminated by a 50 kV x-ray source. Good contrast and sensitivity are achieved even at the Nyquist limit of the sensor resolution. Several images demonstrating the resolution and sensitivity of the sensor are presented.
An amorphous silicon photodiode array was fabricated using a thin-film PECVD process. The 256 by 256 array contains 65,536 pixels on 200 micrometers centers and measures 5 cm on a side. A pixel configuration containing switching diodes instead of the more common TFT switch approach is used to address pixels. The resulting optical fill factor for each pixel is 66%. This device geometry can be scaled both to smaller pixels and large image sensor panels. Custom support electronics mounted on the sensor substrate using a chip-on-glass technique provide the row addressing and pixel charge readout. A scintillator film attaches to the array to convert x-rays to visible light. The basic sensor performance is evaluated under visible light without the scintillator. The device exhibits a dynamic range of 60 - 80 dB, low image lag and good uniformity. The low dark current allows integration times of up to one minute at room temperature without saturating the device. With the scintillator screen attached the device MTF is measured under x-ray illumination. Large changes in MTF are observed for two different types of commercial scintillator.
The power dissipation for large-area high-speed charge-coupled device (CCD) arrays is analyzed. The four mechanisms responsible for power dissipation in a CCD are carrier lift and friction within the CCD channel, load currents through the on-chip output amplifiers, capacitive charge and discharge currents through the epitaxial layer or substrate, and currents flowing through the polysilicon clock register electrodes. These processes are easily calculated for small or slow devices. For large high-speed devices, on the other hand, the conventional analytical techniques are inadequate. The large device area leads to high resistive-capacitive constants in the parallel clock registers, causing clock pulses to degrade in shape as they travel along a clock electrode. A distributed system analysis based on lumped circuit parameters for each pixel is necessary to calculate the current and thus the power dissipated at each point on the surface of the COD. A computer simulation of a standard frame-transfer CCD was performed using SPICE software. The results of the simulation indicate a much lower power dissipation than previously assumed and also point out various problems with conventional device architectures for large-area high-speed CCDs.
The characterization of a 512 by 512 pixel, eight-output full frame CCD manufactured by English Electric Valve under part number CCD13 is discussed. This device is a high- resolution Silicon-based array designed for visible imaging applications at readout periods as low as two milliseconds. The characterization of the device includes mean-variance analysis to determine read noise and dynamic range, as well as charge transfer efficiency, MTF, and quantum efficiency measurements. Dark current and non-uniformity issues on a pixel-to-pixel basis and between individual outputs are also examined. The characterization of the device is restricted by hardware limitations to a one MHz pixel rate, corresponding to a 40 ms readout time. However, subsections of the device have been operated at up to an equivalent 100 frames per second. To maximize the frame rate, the CCD is illuminated by a synchronized strobe flash in between frame readouts. The effects of the strobe illumination on the imagery obtained from the device is discussed.
This paper discusses the design of an RC network model of the parallel clock registers on a charge coupled device. A model has been developed that takes into account the individual pixel capacitance and resistance of the device the line resistance of the polysilicon clock lines and the line-to-line capacitance between adjacent phases. This RC network forms a lossy transmission line that degrades the clock pulses applied to the device as they travel to its center. In the case of high-speed large area CCDs the deterioration in pulse shape can lead to a significant drop-off in charge transfer efficiency (CTE) as a function of distance from the edge of the device. Using SPICE the parallel clock registers of three different CCDs have been simulated. The first device is a large area scientific imager designed to run at relatively slow clock rates. The second CCD is an upgraded version of that device. It includes Aluminum-strapped clock lines to reduce the RC time constant of the clocking structure. The third device is an infrared PtSi imager. The results of the SPICE simulations are used to find the limiting RC time constant of each device and to project its performance as a high-speed imager. 1 .
This paper discusses the design of a multispectral radiometer and camera implemented using a CCD imager, two Silicon photodiode radiometers and a rotating filter wheel equipped with six bandpass filters spaced throughout the visible and near-IR spectrum. One of the radiometers has a field-of-view matched to that of the camera to measure integrated scene radiance, whereas the other radiometer functions as a spot radiometer to measure small surface radiances. The system is synchronized with the 60 Hz camera video and transfers the 16-bit digitized data from the two radiometers once every video field through a parallel interface to a video data encoder. The encoder incorporates the data into the current video field for VCR recording and later playback and analysis. The system is designed for airborne use mounted underneath the wing of an aircraft. Its main purpose is to analyze the spectral radiances of various surfaces involved in high-speed videography experiments. The data obtained with the radiometer will be used to refine specifications for a high-speed, high-resolution solid state imager. However, applications extend to any field where fast, spectral measurements are required. A data set obtained for a sample application is presented to illustrate the performance of the system.