Improved overlay performance is one of the critical elements in enabling the continuing advancement of the
semiconductor integrated circuit (IC) industry. With each advancing process node, additional sources of overlay error
and new methods of reducing those errors need to be taken into account. We consider the impact of mask registration or
pattern placement errors on intra-field on-wafer overlay performance. Mask registration data is typically minimally
sampled and not well incorporated into the wafer fab overlay systems. In this work we consider mask-to-mask overlay
and point out the importance of high density sampling as well as the potential for improved mask qualification and
Mask defect disposition gets more difficult and time-consuming with each progressive lithography node. Mask
inspection tools commonly use 250 nm wavelength, giving resolution of 180 nm, so critical defect sizes are far less than
the optical resolution - too small for defect analysis. Thus the rate of false or nuisance defect detection is increasing
rapidly and analysis of detected defects is increasingly difficult. As to judging the wafer printability of defects, AIMS
(Aerial Image Measurement System) tools are commonly used but are also time-consuming if defect count is high. For
improving the efficiency of mask defect disposition, we propose the combination of a SEM defect review tool and defect
disposition and simulation software, which use high-resolution SEM images of defects to do defect review, defect
disposition, and wafer printing simulation of defects automatically or manually.
The SEM defect review tool, DIS-05 developed by Holon Co. Ltd., is designed for defect review and disposition using
reference images derived from e-beam files or CAD database. This tool uses the Automated Defect Analysis Software
(ADAS) developed from AVI LLC. to interface the inspection tool and the DIS-05. ADAS detects false defects before
SEM imaging and performs aerial image simulation from the SEM and CAD images to estimate the wafer CD error
caused by each defect. We report on its speed (>300 defects/hour), classification accuracy and simulation accuracy when
used with masks at the 45 nm technology node and beyond. This combination of SEM and ADAS is expected to
significantly accelerate process development and production for the 45 and 32 nm nodes. It will also increase the masksper-
day throughput of inspection and AIMS tools by shifting most defect review to ADAS software using SEM images.
At preliminary tests showed the combination tool can do auto defect disposition and simulation with promising results.
A new DUV high-resolution reticle defect inspection platform has been developed. This platform is designed to meet the reticle qualification requirements of the 65-nm node and beyond. In this system, the transmitted and reflected inspection lights are collected simultaneously to produce reticle images at high speed. Transmitted and reflected inspections in the die-to-die (DD) and the die-to-database (DB) modes can be executed concurrently. Both images can be gathered at full synchronization with low noise. Basically, both inspection modes are needed to detect as many types of hard and soft defects as possible. Concurrent inspection saves time from using transmitted and reflected lights sequentially. In this presentation, results of DD and DB inspection using standard programmed defect test reticles as well as advanced 65-nm production reticles, are given, showing high-sensitivity and low-false-count detections being achieved with low operating cost.