We report on progress towards a charge-based qubit using phosphorus atoms implanted in a silicon substrate. Prototype devices have been fabricated using standard lithographic techniques together with a new method of controlled single ion implantation using on-chip detector electrodes. Positional accuracy of the implanted ions was achieved using a nanoaperture mask defined using electron beam lithography. The two implanted phosphorus atoms are positioned ~50 nm apart, to form a qubit test device. A series of process steps has been developed to repair implant damage, define surface control gates, and to define single electron transistors used for qubit readout via the detection of sub-electron charge transfer signals. Preliminary electrical measurements on these devices show single charge transfer events that are resilient to thermal cycling.
By capactively coupling sensitive charge detectors (i.e. single-electron transistors - SETs) to nanostructures such as quantum dots and two-dimensional systems, it is possible to investigate charge transport properties in extremely low conduction regimes where direct transport measurements are increasingly difficult. Ion-implanted nano-MOSFETs coupled to aluminium SETs have been constructed in order to study charge transport between locally doped regions in Si at mK temperatures. This configuration allows for direct source-drain measurement as well as non-invasive charge detection. Of particular interest are the effects of material defects and gate control on charge transport, which is of relevance to Si-based quantum computing.
The construction of micro- and nano-scale electronic devices that exploit the properties of single atoms have been proposed. A very promising device is a silicon based solid state quantum computer based on an array of single 31P atoms as qubits in a pure 28Si substrate. Operation of the device requires independent control, coupling and readout of the state of individual qubits. We have developed a construction strategy for a few qubit device based on ion implantation of the qubits into prefabricated cells. An ion energy of less than 20 keV is necessary to ensure the ion range is at the required depth in the substrate which is of the order of 20 nm. Single ion impacts are registered by the electrical transient induced in an external circuit. Electron Beam Lithography fabricated cells, containing electrodes of the required nanometre scale, have been implanted with 14 keV 31P ions and the pulse height spectrum of single ion impacts has been successfully recorded. Discrimination on the pulse height allows rejection of ions that suffer unacceptable straggling. This opens the way to the rapid construction of a two qubit device in the first instance that will test many of the essential mechanisms of a revolutionary solid state quantum computer.
We describe progress in a range of nanofabrication processes for the production of silicon-based quantum computer devices. The processes are based upon single-ion implantation to place phosphorus-31 atoms in accurate locations, precisely self-aligned to metal control gates. These fabrication schemes involve multi-layer resist and metal structures, electron beam lithography and multi-angled aluminium shadow evaporation. The key feature of all fabrication schemes is a gate pattern defined in a resist structure using electron beam lithography, used in conjunction with a second pattern written in another resist layer. The locations where the two patterns overlap define channels down to the substrate through which ions can be implanted, with the remaining metal/resist structure behaving as a mask. Further processing on the resist structures allows for deposition of the control gates and read-out structures. Central to this process is a new technique which allows for control of the implantation process at a single-ion level.
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