The data volume is increasing exponentially in mask data preparation (MDP) flows for sub-45nm technologies, but
time to market drives the acceptable total turnaround time. As a reasonable response, more computing resources are
purchased to address these two issues. How to effectively use these resources including the latest CPUs, high-speed
networking, and the fastest data storage devices is becoming an urgent problem to solve. A detailed study is conducted in
an attempt to find an optimal solution to this problem. In particular, how CPU speed, bandwidth of network connections,
and I/O speed of data storage devices affect the total turnaround time (TAT) in a mask data preparation flow is
researched. For a given High Performance Computing (HPC) budget and MDP flow TAT constraints, methodologies to
optimize HPC resources are proposed.
In order to fully exploit the design knowledge during the operation of mask manufacturing equipment, as well as to
enable the efficient feedback of manufacturing information upstream into the design chain, close communication links
between the data processing domain and the machine are necessary.
With shrinking design rules and modeling technology required to drive simulations and corrections, the amount and
variety of measurements, for example, is steadily growing. This requires a flexible and automated setup of parameters
and location information and their communication with the machine.
The paper will describe a programming interface based on the Tcl/Tk language that contains a set of frequently
reoccurring functions for data extraction and search, site characterization, site filtering, and coordinate transfer. It
enables the free programming of the links, adapting to the flow and the machine needs. The interface lowers the effort
to connect to new tools with specific measurement capabilities, and it reduces the setup and measurement time. The
interface is capable of handling all common mask writer formats and their jobdecks, as well as OASIS and GDSII data.
The application of this interface is demonstrated for the Carl Zeiss AIMSTM system.
Data Preparation for photomask manufacturing is characterized by computational complexity that grows faster than the
evolution of computer processor ability. Parallel processing generally addresses this problem and is an accepted
mechanism for preparing mask data. One judges a parallel software implementation by total time, stability and
predictability of computation. We apply several fundamental techniques to dramatically improve these metrics for a
parallel, distributed MDP system. This permits the rapid, predictable computation of the largest mask layouts on
conventional computing clusters.
We describe in more detail a mask data preparation (MDP) flow previously proposed. The focus on this paper is a performance comparison of hierarchical fracturing techniques compared to standard fracturing. Our flow uses GDSII data as input, including a GDSII-based job deck description. The output is maximally compacted, trapezoidal mask writer (MW) formatted data. Our flow takes advantage of hierarchy explicit in the GDSII file(s). This allows optimal determination of 'cover cells', which are repeatable groups of patterns within the data. The use of cover cells allows a reduction of fracturing runtime. In one case, a 21 GB MEBES file was fractured in 30 hours using the standard technique and 53 minutes using the hierarchical cover cell technique.
A self-pulling soldering technology has been demonstrated for assembling liquid crystal on silicon (LCOS) spatial light modulators (SLMs). One of the major challenges in manufacturing the LCOS modules is to reproducibly control the thickness of the gap between the very large scale integrated circuit (VLSI) chip and the cover glass. The liquid crystal material is sandwiched between the VLSI chop and the cover glass which is coated with a transparent conductor. Solder joints with different profiles and sizes have been designed to provide surface tension forces to control the gap accommodating the ferroelectric liquid crystal layer in the range of a micron level with sub- micron uniformity. The optimum solder joint design is defined as a joint that results in the maximum pulling force. This technology provides an automatic, batch assembly process for a LCOS SLM through one reflow process. Fluxless soldering technology is used to assemble the module. This approach avoids residues from chemical of flux and oxides, and eliminates potential contamination to the device. Two different LCOS SLM designs and the process optimization are described.