Dr. Xima Zhang Profile

Dr. Xima Zhang

Senior Product Manager at Siemens EDA

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Author

Publications (16)

Proceedings Article | 10 April 2024 Presentation + Paper

Model-based OPC using the MEEF matrix III

Junjiang Lei, Yi Yang, George Lippincott, Xima Zhang

Proceedings Volume 12954, 1295418 (2024) https://doi.org/10.1117/12.3010562

KEYWORDS: Optical proximity correction, Photomasks, Matrices, Semiconducting wafers, Model based design, Histograms, Extreme ultraviolet, Electronic design automation

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Proceedings Article | 10 April 2024 Presentation

An integrated verification flow for curvilinear mask

Shuling Wang, Shumay Shang, Sagar Saxena, Xima Zhang, George Lippincott, Le Hong, John Sturtevant

Proceedings Volume 12954, 1295415 (2024) https://doi.org/10.1117/12.3010925

KEYWORDS: Optical proximity correction, Lithography

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Proceedings Article | 10 April 2024 Poster + Paper

Towards efficient and accurate cost functions for EUVL stochastic-aware OPC correction and verification: via failure probability versus image and process variation band metrics

Shuling Wang, Azat Latypov, Shumay Shang, Germain Fenger, Chih-I Wei, Xima Zhang

Proceedings Volume 12953, 1295319 (2024) https://doi.org/10.1117/12.3010912

KEYWORDS: Failure analysis, Stochastic processes, Monte Carlo methods, Optical proximity correction, Extreme ultraviolet lithography, Image processing, Photovoltaics, Photon transport, Light absorption, Industry

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Proceedings Article | 10 April 2024 Presentation + Paper

OPC and modeling solution towards 0.55NA EUV stitching

Dongbo Xu, Werner Gillijns, Stewart Wu, Abdulrazaq Adams, Vincent Wiaux, Vicky Philipsen, Xima Zhang, Edita Tejnil, Germain Fenger

Proceedings Volume 12953, 129530K (2024) https://doi.org/10.1117/12.3010519

KEYWORDS: Optical proximity correction, Semiconducting wafers, Extreme ultraviolet lithography, Modeling, Scanners, Reticles

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Proceedings Article | 28 April 2023 Paper

Patterning assessment using 0.33NA EUV single mask for next generation DRAM manufacturing

Jeonghoon Lee, Sandip Halder, Van Tuong Pham, Roberto Fallica, Seonggil Heo, Kaushik Sah, Hyo Seon Suh, Victor Blanco, Werner Gillijns, Andrew Cross, Ethan Maguire, Ana-Maria Armeanu, Vladislav Liubich, Evgeny Malankin, Xima Zhang, Monica Kempsell Sears, Neal Lafferty, Germain Fenger, Chih-I Wei, Ryoung Han Kim

Proceedings Volume 12495, 124950S (2023) https://doi.org/10.1117/12.2660763

KEYWORDS: Optical lithography, Extreme ultraviolet, Optical proximity correction, Design and modelling, SRAF, Semiconducting wafers, Inspection, Source mask optimization, Printing, Electronic design automation

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Proceedings Article | 28 April 2023 Paper

EUV full-chip curvilinear mask options for logic via and metal patterning

Neal Lafferty, Sagar Saxena, Keisuke Mizuuchi, Yuansheng Ma, Xima Zhang, Pat LaCour, Alexander Tritchkov, Farah Kmiec, John Sturtevant

Proceedings Volume 12495, 124950K (2023) https://doi.org/10.1117/12.2647882

KEYWORDS: SRAF, Optical proximity correction, Machine learning, Lithography, Simulations

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Proceedings Article | 28 April 2023 Presentation + Paper

Application of resolution enhancement techniques at high NA EUV for next generation DRAM patterning

Ana-Maria Armeanu, Evgeny Malankin, Neal Lafferty, Chih-I Wei, Monica Kempsell Sears, Germain Fenger, Xima Zhang, Werner Gillijns, Darko Trivkovic, Ryoung-han Kim, Jeonghoon Lee

Proceedings Volume 12495, 124950A (2023) https://doi.org/10.1117/12.2660413

KEYWORDS: Photomasks, Extreme ultraviolet, Source mask optimization, Resolution enhancement technologies, Optical proximity correction, Lithography, Optical lithography, Capacitors, Semiconducting wafers, SRAF

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Among several critical layers of DRAM (dynamic random-access memory), capacitor holes of honeycomb arrays and bit-line-periphery (BLP) with Storage Node Landing Pad (SNLP) are the most critical layers in terms of patterning difficulty level. The honeycomb array hole layer has the highest density among various hole array types, and it is a complex lithography step since this layer is key in determining the performance of the DRAM. BLP with SNLP includes hole type and bi-directional line/space (L/S) design, and industry is considering a single exposure solution, compared to a three-mask solution using ArF immersion [1]. This BLP layer of 10nm DRAM has 2 different types of pattern topologies, hole array and bi-direction line/space: it is a very challenging single exposure level. In this paper, we discuss patterning challenges that come as consequences of industry trends in DRAM cell size reduction [2,3]. To keep up with this trend and to propose a single mask solution for bit-line-periphery, storage node landing pads and aggressive cell array pitches are considered along with resolution enhancement techniques (RET) for high-NA anamorphic EUV (NA=0.55) lithography. This study uses computational lithography such as source mask optimization (SMO) to find optimal off-axis illumination and optimal placement of sub-resolution assist features (SRAF) on the mask whilst considering the manufacturing rules checks (MRC constraints) for anamorphic EUV masks. In order to achieve that, a screening Design Technology Co-optimization (DTCO) experiment is done. The purpose is to identify cell array pitches in between 24nm and 32nm which satisfy both scaling requirements and patterning fidelity, preferred orientation of layout, and mask biasing scheme for various cell arrays. Lithography metrics like common depth of focus (cDoF), exposure latitude (EL), image contrast, and image log slope (ILS) are used to decide what is optimal way to expose on wafer. For the sake of completeness of the study, mask materials are compared. Indeed, in EUV domain there is interest to use alternative mask absorbers like Ruthenium alloys as an alternative to Tantalum-based absorbers [4,5,6].

Proceedings Article | 28 April 2023 Presentation + Paper

Compact modeling of stochastics and application in OPC

Werner Gillijns, Jae-uk Lee, Ryan Ryoung han Kim, Chih-I Wei, Xima Zhang, Azat Latypov, Germain Fenger, John Sturtevant

Proceedings Volume 12494, 124940J (2023) https://doi.org/10.1117/12.2658260

KEYWORDS: Optical proximity correction, Stochastic processes, Semiconducting wafers, Modeling, Simulations, Design and modelling, Extreme ultraviolet lithography, Calibration, Logic, Lithography

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Proceedings Article | 12 October 2021 Presentation + Paper

Rapid full-chip curvilinear OPC for advanced logic and memory

Vlad Liubich, Keisuke Mizuuchi, Alexander Tritchkov, Ashutosh Rathi, Xima Zhang, Isabella Kim, John Sturtevant

Proceedings Volume 11855, 118550S (2021) https://doi.org/10.1117/12.2601786

KEYWORDS: Optical proximity correction, SRAF, Photomasks, Lithography, Manufacturing

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The patterning requirements of next generation lithographic processes and the desire to keep manufacturing costs down have pushed the lithographers to explore the advantages of the curvilinear masks. Multiple studies backed by the experimental results have demonstrated the lithographic advantage of the curvilinear (CL) photomasks over the rectilinear (RL) approximations by showing improved MEEF, depth of focus (DoF) and common DoF (CDoF) for variety of patterns on the same mask, ILS and, as a result, process window (PW) of the CL masks over its close RL siblings [1,2]. Manufacturability of the CL masks has been limited due to the architecture of the Variable Shaped Beam (VSB) writers, which made it prohibitive from both mask data preparation (MDP) and mask writing perspective. The availability of Multi Beam Mask Writers (MBMW) has removed these roadblocks and brought introduction of the curvilinear masks much closer to reality. The development of novel approaches for MDP and Mask Proximity Correction (MPC) as it is demonstrated by Bork et al in [3] brought further advances in availability of the CL masks for high volume manufacturing (HVM). Traditionally the Inverse Lithography Technology (ILT) has offered the most potential to achieve significant lithographic advantage over RL masks but has suffered from very long data preparation runtimes which presented an additional hurdle for broad deployment in manufacturing. While various speed up options such as machine learning-based acceleration, and GPU processing [4,5] are being explored, the full chip ILT run time still represents significant challenge in the HVM world. This paper will concentrate on two OPC approaches that allow CL mask generation without run time penalties associated with full chip ILT processing. The first is based on a hybrid methodology that allows for generation of the CL mask shapes by using fast ILT-based algorithms for SRAF generation while the main features are controlled to allow for full chip processing within the reasonable time. The second approach is more appropriate for the memory applications where patterns are highly repetitive. Due to high level of repetition, it is acceptable to use full ILT correction carried over a small area of the chip and to utilize pattern matching (PM) methodologies to propagate both SRAFs and OPC-corrected features from unique to non-unique pattern placements. Such a methodology allows for the full ILT advantages in the highly critical memory array areas.

Proceedings Article | 26 March 2019 Presentation + Paper

Implementation of different cost functions for EUV mask optimization for next generation beyond 7nm

Fan Jiang, Alexander Tritchkov, Alex Wei, Srividya Jayaram, Yuyang Sun, Xima Zhang, James Word

Proceedings Volume 10957, 1095712 (2019) https://doi.org/10.1117/12.2513560

KEYWORDS: SRAF, Image quality, Extreme ultraviolet, Extreme ultraviolet lithography, Photomasks, Lithography

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As the technology node gets smaller and smaller, the benefit from Sub-Resolution Assist Features (SRAF) becomes significant in EUV lithography which makes SRAFs a must-have tool for next generation beyond 7nm technology. When considering EUV specific effects, the metrics that need to be accounted for include Image Log-Slope (ILS), Process Variability (PV Band), common Depth of Focus (cDOF), and Image Shift (ImS) through focus. When these critical factors are accounted for during the EUV mask generation the optimization become much more complicated and challenging and necessitates the need for SRAFs beyond 7nm. SRAF helps enhance not only the PV Band, but more importantly helps boost the ILS, which is one of the key factors for improving stochastic effect in EUV. However, ILS is just one of the important image quality metric that we should focus on. For metal layers, Image Shift is another key factor which can have a big impact on overlay. ImS at the nominal condition could be compensated by Optical Proximity Correction (OPC), but image shift through focus can hardly be tuned by the main feature correction. The image shift through focus can be mitigated by SRAF insertion. Strong 3D mask effects can cause best focuses of different patterns to be far apart in EUV, which can cause an unusable cDOF even when the individual depth of focus values of all the patterns are not bad. SRAFs can be inserted to improve the individual depth of focus and align the best focuses together to help enhance the common process window. When taking account of various different EUV specific metrics mentioned above, then the most critical question for the next generation beyond 7nm is “How to define the cost function for mask optimization with SRAFs?” (Figure 1, EUV mask optimization flow for next generation beyond 7nm). In this study the image quality metrics including ILS, PVBand, cDOF, and ImS are evaluated. For each optimization schema using different cost functions, we examine the cost function metric and its impact on the other image quality metrics. We also present the potential trade-offs together with the analysis. Furthermore, multiple cross cost functions are defined for SRAF optimization and the results are analyzed accordingly. Both contact and metal layer patterns representing next generation beyond 7nm design rules are investigated. In our testing, symmetric standard sources from ASML NXE3400 is examined and the results are compared and analyzed.

Proceedings Article | 22 October 2018 Presentation + Paper

Lithographic benefits and mask manufacturability study of curvilinear masks

Vivian Wei Guo, Fan Jiang, Jed Rankin, Ingo Bork, Alexander Tritchkov, Alexander Wei, Yuyang Sun, Srividya Jayaram, Larry Zhuang, Xima Zhang, Todd Bailey, James Word

Proceedings Volume 10810, 108100P (2018) https://doi.org/10.1117/12.2501973

KEYWORDS: Photomasks, SRAF, Printing, Lithography, Vestigial sideband modulation, Semiconducting wafers, Optical proximity correction, Manufacturing, Image quality, Image processing

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SPIE Journal Paper | 31 July 2018

Subresolution assist features impact and implementation in extreme ultraviolet lithography for next-generation beyond 7-nm node

Vivian Wei Guo, Fan Jiang, Alexander Tritchkov, Srividya Jayaram, Scott Mansfield, Larry Zhuang, Yuyang Sun, Xima Zhang, Todd Bailey, James Word

JM3, Vol. 18, Issue 01, 011003, (July 2018) https://doi.org/10.1117/12.10.1117/1.JMM.18.1.011003

KEYWORDS: SRAF, Photomasks, Metals, Extreme ultraviolet lithography, Personal protective equipment, Photovoltaics, Extreme ultraviolet, Image quality, Source mask optimization, Lithography

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The next-generation beyond 7-nm node potentially requires the implementation of subresolution assist features (SRAF) with extreme ultraviolet (EUV) lithography. This paper aims at providing a clear SRAF strategy for the next-generation beyond 7-nm node designs through a series of experiments. Various factors are considered, including stochastic effects, three-dimensional (3-D) mask effects, through-slit effects, aberrations, and pixelated source mask optimization (SMO) sources. We consider process variability bands with a variety of process conditions, including focus/dose/mask bias changes and also the normalized image log-slope/image log-slope as our objective functions, to determine what the best SRAF solution is for a set of test patterns. Inverse lithography technology is implemented to optimize both the main feature (MF) mask and SRAF placement, in particular, asymmetric SRAF placement to balance the 3-D mask effects. SRAF can potentially mitigate image shift through-focus, i.e., nontelecentricity, caused by EUV 3-D shadowing effect. This shadowing effect is pattern-dependent and contributes to the overlay variation. As we approach the next-generation beyond 7-nm node, this image shift can be more significant relative to the overlay budget, hence, we further investigate the impact of SRAF placement to the image shift. Moreover, the center of focus shift due to the large 3-D mask absorber thickness can be potentially mitigated by SRAF implementation. The common process window is significantly impacted by both the center of focus shift and the individual depth of focus and is evaluated using both metal and contact layer test cases. We study the source impact to SRAF insertion by experimenting with both a symmetric source (standard source) and an asymmetric source (SMO source). Finally, we understand the importance of using full flare map and full through-slit model (including aberration variation through-slit) in the MF correction. Furthermore, we evaluate the need of using full models in SRAF insertion. This is a necessary step to determine the strategy of SRAF implementation for the next-generation beyond 7-nm node.

Proceedings Article | 19 March 2018 Paper

SRAF requirements, relevance, and impact on EUV lithography for next-generation beyond 7nm node

Vivian Wei Guo, Fan Jiang, Alexander Tritchkov, Srividya Jayaram, Scott Mansfield, Larry Zhuang, Yuyang Sun, Xima Zhang, Todd Bailey

Proceedings Volume 10583, 105830N (2018) https://doi.org/10.1117/12.2297410

KEYWORDS: SRAF, Photomasks, Extreme ultraviolet lithography, Image quality, Source mask optimization, Optical proximity correction

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The next generation beyond 7nm node potentially requires the implementation of Sub-Resolution Assist Features (SRAF) with EUV lithography. This paper aims at providing a clear SRAF strategy for the next generation beyond 7nm node designs through a series of experiments. Various factors are considered, including: stochastic effects, 3D mask effects, through-slit effects, aberrations, and pixelated SMO sources.

EUV has 13.5nm as its wavelength, which is much smaller than the wavelength used in ArF lithography, and this gives very different imaging challenges compared to the ArF case. Due to the small wavelength and numerical aperture (NA) of the current EUV tools, depth of focus is not as significant of a concern as in DUV. Instead, EUV lithography is severely challenged by stochastic effects, which are directly linked to the slope of the intensity curve. DUV SRAF has been shown to be a powerful tool for improving NILS/ILS, as well as DOF, and here we explore how that translates into EUV imaging. In this paper, we consider Process Variability (PV) Bands with a variety of process conditions including focus/dose/mask bias changes and also the NILS/ILS as our objective functions, to determine what the best SRAF solution is for a set of test patterns. We have full investigations on both symmetric SRAF and asymmetric SRAF.

SRAF can potentially mitigate image shift through focus, i.e. non-telecentricity, caused by EUV 3D shadowing effect. This shadowing effect is pattern dependent and contributes to the overlay variation. As we approach the next generation beyond 7nm node, this image shift can be more significant relative to the overlay budget, hence we further investigate the impact of SRAF placement to the image shift. Moreover, the Center of Focus shift due to the large 3D mask absorber thickness can be potentially mitigated by SRAF implementation. The common process window is significantly impacted by both the center of focus shift and the individual depth of focus. We study the change by adding SRAF using both a symmetric source (standard source) and an asymmetric source (SMO source). Once SRAF is inserted for the test patterns, the common process window is plotted to compare the solutions with and without SRAF.

Finally, we understand the importance of using full flare map and full through slit model (including aberration variation through slit) in the main feature correction, but in this paper, we will further evaluate the need of using full models in SRAF insertion. This is a necessary step to determine the strategy of SRAF implementation for the next generation beyond 7nm node.

Proceedings Article | 15 March 2016 Paper

A novel full chip process window OPC based on matrix retargeting

Xima Zhang, Zhitang Yu, Qingwei Liu, Xuan Shen, Liguo Zhang, Le Hong, Vlad Liubich, George Lippincott, Cynthia Zhu, James Word

Proceedings Volume 9780, 97801C (2016) https://doi.org/10.1117/12.2219913

KEYWORDS: Computer programming, Optical proximity correction, Resolution enhancement technologies, Metals, Computational lithography, Model-based design, Photomasks, Optical lithography, Lithography, Semiconducting wafers, Data modeling, Visualization

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Proceedings Article | 1 April 2008 Paper

Advanced OPC and 2D verification for tip engineering using aggressive illuminations

X. Zhang, T. Lukanc, H. Yang, B. Ward

Proceedings Volume 6924, 69241H (2008) https://doi.org/10.1117/12.773021

KEYWORDS: Optical proximity correction, Scanning electron microscopy, Illumination engineering, Resolution enhancement technologies, Bridges, Printing, Aberration correction, Semiconducting wafers, Algorithm development, Manufacturing

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Proceedings Article | 12 July 2002 Paper

Evolution and integration of optimal IC design: performance and manufacturing issues

Daniel Cole, So-Yeon Baek, Xima Zhang

Proceedings Volume 4692, (2002) https://doi.org/10.1117/12.475683

KEYWORDS: Manufacturing, Microelectronics, Computer aided design, Semiconductors, Design for manufacturability, Yield improvement, Nanoelectronics, Lithography, Field effect transistors, Control systems

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