We successfully fabricated 4.7-inch organic thin film transistors array with 320×240 pixels on flexible substrate. The
mobility, ON/OFF ratio, subthreshold swing and threshold voltage of OTFT on flexible substrate are: 0.015 cm2/V-s, 1.1
V/dec, 10E6 and -3.2 V. After laminated Sipix electrophoretic media on OTFT array, a panel of 4.7 inch 320×240
OTFT-EPD was fabricated. All of process temperature in OTFT-EPD is lower than 130 . The pixel size in our panel is
300 μm × 300 μm, and the aperture ratio is over than 50 %. The OTFT channel length and width is 20 μm and 200μm,
respectively. The operation voltages used on the gate bias is -30 V during the row data selection and the gate bias are 0 V
during the row data hold time. The data voltages used on the source bias are -20 V, 0 V, and 20 V during display media
We successfully fabricated 5-inch organic thin film transistors array with 320×240 pixels on
flexible substrate. All the processes were done by photolithography, spin coating and ink-jet printing.
The OTFT-Electrophoretic (EP) pixel structure, based on a top gate OTFT, was fabricated. The
mobility, ON/OFF ratio, subthreshold swing and threshold voltage of OTFT on flexible substrate are:
0.01 cm2/V-s, 1.3 V/dec, 10E5 and -3.5 V. After laminated the EP media on OTFT array, a panel of 5
inch 320×240 OTFT-EPD was fabricated. All of process temperature in 10×10 OTFT-EPD is lower
than 150 . The pixel size in our panel is 300 μm × 300 μm, and the aperture ratio is 50 %. The OTFT
channel length and width is 20 μm and 200μm, respectively. We also used OTFT to drive EP media
successfully. The operation voltages that are used on the gate bias are -30 V during the row data
selection and the gate bias are 0 V during the row data hold time. The data voltages that are used on the
source bias are -20 V, 0 V, and 20 V during display media operation.
Mono-chrome phosphorescence Organic light emitting diodes (OLEDs) operated by organic thin-film transistors (OTFTs) with a 32×32 array are fabricated with a novel method, and the results reveal a fabulous demonstration. The later isolation, which segregated source/drain electrodes and an OLED cathode, was designed in our OTFT-OLED pixel. In the OTFT-OLED process; we used the polymer isolating layer which was deposited by spin coating and patterned by traditional photo-lithography before the organic semiconductor and OLED deposition. However, the residue polymer affect of OTFT electric properties which have poor mobility (5×10-4 cm2/V-s), a lower on/off ratio (~103), and a positive threshold voltage (4.5 V), and devices, have poor uniformity. Using UV-Ozone treatment could enhance OTFT mobility (2×10-2 cm2/V-s) and permit higher devices uniformity, but the threshold voltage would still have a positive 5.1 V. This threshold voltage was not a good operation mode for display application because this operation voltage was not fit for our driving systems. In order to overcome this problem, a new structure of OTFT-OLED pixel was designed and combined with a new-material isolating layer process. This new process could fabricate an OTFT-OLED array successfully and have a nice uniformity. After the isolating layer process, OTFT devices have a higher mobility (0.1×10-2 cm2/V-s), a higher on-off ratio (~107) a lower threshold voltage (-9.7 V), and a higher devices uniformity.
Many researches report that the mobility in organic material is dependent on not only the gate field but also the grain size.
There is also some evidence to prove that the gate length is strongly related to the carrier mobility. We construct both the
analytical model of organic thin film transistor and the large signal circuit model designed by T-CAD to fit the measured
I DS - V DS curves. We first apply basic I DS - V DS equations in both triode and saturation regions with mobility μ best
fitted to measured I-V curves. The "best-fitted" μ increases with the gate length, and is related to the increase of total
channel resistance due to the presence of small grains size of pentacene next to source/drain electrodes. We then use the
Advanced Design System software to design the large signal circuit model. Similar to the MOSFET, we add the
additional parameters to fit the I DS - V DS curves, ex: Rgd, Rgs, and Rp. Here, Rgd. With the circuit simulation, we find
that Rgd presents the leakage current from gate to source, and it affects the slope of curves in the saturation region in the
I DS - V DS curves. The equivalent circuit can fit the I DS - V DS curves very well with the proper parameter set.