We discuss the joint development by Penn State University (PSU) and Teledyne Imaging Systems (TIS) of hybrid CMOS detectors for X-ray astronomy, and specifically the development over the past 10 years of a new event-driven X-ray detector for future astronomy missions. This novel X-ray detector is designed to perform onchip event recognition and to read out only pixels containing X-ray events. With the exception of analog power supply voltages, the detector is digital in/digital out, reducing off-chip electronics to a minimum. It operates at frame rates of over 1000 frames per second, providing excellent performance for bright X-ray sources and/or high-throughput optics. The pixel size is 40 × 40 microns, and we are fabricating devices with 550 × 550 pixels.
The detector system for the Euclid Near-Infrared Spectrometer and Photometer (NISP) instrument is a 4×4 mosaic focal plane of 16 H2RG (2K×2K pixels) infrared Sensor Chip Assemblies (SCAs) and 16 SIDECAR ASIC Sensor Chip Electronics (SCE) modules. Teledyne has successfully completed the fabrication, testing, and delivery of 24 sciencegrade flight candidate SCAs to the NASA Jet Propulsion Laboratory (JPL). These SCAs were made with Teledyne’s TRL-9 substrate-removed MBE mercury cadmium telluride (HgCdTe) 2.3 μm cutoff detector material and low-noise H2RG CMOS readout chip. The SCAs are mounted on a buttable molybdenum package that enables close packing of the 16 flight SCAs in the NISP focal plane. In this paper, we present the test results of the 24 Euclid flight candidate SCAs. The key detector performance parameters that are critical to the NISP instrument are: high in-band quantum efficiency with good spatial uniformity, low readout noise, low dark current with tight distribution, low pixel crosstalk, low persistence, and good detector surface metrology profile. All 24 SCAs exceed the Euclid NISP performance and interface requirements. The additional acceptance testing at JPL and NASA Goddard’s Detector Characterization Lab has also been completed. 20 flight SCAs have been delivered to European Space Agency (ESA).
We report our progress toward optimizing backside-illuminated silicon P-type intrinsic N-type complementary metal oxide semiconductor devices developed by Teledyne Imaging Sensors (TIS) for far-ultraviolet (UV) planetary science applications. This project was motivated by initial measurements at Southwest Research Institute of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures, which revealed a promising QE in the 100 to 200 nm range. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include the following: (1) representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory; (2) preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; (3) detector fabrication was completed through the pre-MBE step; and (4) initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments.
A new burst-mode, 10-frame, hybrid Si-sensor/CMOS-ROIC FPA chip has been recently fabricated at Teledyne Imaging Sensors. The intended primary use of the sensor is in the multi-frame 800 MeV proton radiography at LANL. The basic part of the hybrid is a large (48×49 mm2) stitched CMOS chip of 1100×1100 pixel count, with a minimum shutter speed of 50 ns. The performance parameters of this chip are compared to the first generation 3-frame 0.5-Mpixel custom hybrid imager. The 3-frame cameras have been in continuous use for many years, in a variety of static and dynamic experiments at LANSCE. The cameras can operate with a per-frame adjustable integration time of ~ 120ns-to- 1s, and inter-frame time of 250ns to 2s. Given the 80 ms total readout time, the original and the new imagers can be externally synchronized to 0.1-to-5 Hz, 50-ns wide proton beam pulses, and record up to ~1000-frame radiographic movies typ. of 3-to-30 minute duration. The performance of the global electronic shutter is discussed and compared to that of a high-resolution commercial front-illuminated monolithic CMOS imager.
We report our progress toward optimizing backside-illuminated silicon PIN CMOS devices developed by Teledyne Imaging Sensors (TIS) for far-UV planetary science applications. This project was motivated by initial measurements at Southwest Research Institute (SwRI) of the far-UV responsivity of backside-illuminated silicon PIN photodiode test structures described in Bai et al., SPIE, 2008, which revealed a promising QE in the 100-200 nm range as reported in Davis et al., SPIE, 2012. Our effort to advance the capabilities of thinned silicon wafers capitalizes on recent innovations in molecular beam epitaxy (MBE) doping processes. Key achievements to date include: 1) Representative silicon test wafers were fabricated by TIS, and set up for MBE processing at MIT Lincoln Laboratory (LL); 2) Preliminary far-UV detector QE simulation runs were completed to aid MBE layer design; 3) Detector fabrication was completed through the pre-MBE step; and 4) Initial testing of the MBE doping process was performed on monitoring wafers, with detailed quality assessments. Early results suggest that potential challenges in optimizing the UV-sensitivity of silicon PIN type CMOS devices, compared with similar UV enhancement methods established for CCDs, have been mitigated through our newly developed methods. We will discuss the potential advantages of our approach and briefly describe future development steps.
We describe vacuum ultraviolet sensitivity measurements of a new high performance silicon-based CMOS sensor from
Teledyne Imaging Sensors. These sensors do not require the high voltages of MCP detectors, making them a lower mass
and power alternative to the more mature MCP technology. These devices demonstrate up to 40 percent quantum
efficiency at vacuum ultraviolet wavelengths, either meeting or greatly exceeding 10 percent quantum efficiency across
the entire 100-200 nm wavelength region. As with similar visible sensitive devices, backside illumination results in a
higher quantum efficiency than frontside illumination. Measurements of the vacuum ultraviolet sensitivity of the
Teledyne silicon PIN detectors were made by directing a known intensity of ultraviolet light at discrete wavelengths onto
the test detectors and reading out the resulting photocurrent. The sensitivity of the detector at a given wavelength was
then calculated from the intensity and wavelength of the incoming light and the relative photodiode to NIST-traceable
calibration diode active areas. A custom electromechanical interface was developed to make these measurements within
the SwRI Vacuum Radiometric Calibration Chamber. While still in the single pixel stage, full 1K × 1K focal plane
arrays are possible using existing CMOS readout electronics and hold great promise for inclusion in future spaceflight
instrument concepts.
Yibin Bai, William Tennant, Selmer Anglin, Andre Wong, Mark Farris, Min Xu, Eric Holland, Donald Cooper, Joseph Hosack, Kenneth Ho, Thomas Sprafke, Robert Kopp, Brian Starr, Richard Blank, James Beletic, Gerard Luppino
Teledyne’s silicon hybrid CMOS focal plane array technology has matured into a viable, high performance and high-
TRL alternative to scientific CCD sensors for space-based applications in the UV-visible-NIR wavelengths. This paper
presents the latest results from Teledyne’s low noise silicon hybrid CMOS visible focal place array produced in 4K×4K format with 10 μm pixel pitch. The H4RG-10 readout circuit retains all of the CMOS functionality (windowing, guide
mode, reference pixels) and heritage of its highly successful predecessor (H2RG) developed for JWST, with additional
features for improved performance. Combined with a silicon PIN detector layer, this technology is termed HyViSI™
(Hybrid Visible Silicon Imager). H4RG-10 HyViSI™ arrays achieve high pixel interconnectivity (<99.99%), low
readout noise (<10 e- rms single CDS), low dark current (<0.5 e-/pixel/s at 193K), high quantum efficiency (<90%
broadband), and large dynamic range (<13 bits). Pixel crosstalk and interpixel capacitance (IPC) have been predicted
using detailed models of the hybrid structure and these predictions have been confirmed by measurements with Fe-55 Xray
events and the single pixel reset technique. For a 100-micron thick detector, IPC of less than 3% and total pixel
crosstalk of less than 7% have been achieved for the HyViSI™ H4RG-10. The H4RG-10 array is mounted on a
lightweight silicon carbide (SiC) package and has been qualified to Technology Readiness Level 6 (TRL-6). As part of
space qualification, the HyViSI™ H4RG-10 array passed radiation testing for low earth orbit (LEO) environment.
The development of Hybrid CMOS Detectors (HCDs) for X-Ray telescope focal planes will place them in contention
with CCDs on future satellite missions due to their faster frame rates, flexible readout scenarios, lower
power consumption, and inherent radiation hardness. CCDs have been used with great success on the current
generation of X-Ray telescopes (e.g. Chandra, XMM, Suzaku, and Swift). However their bucket-brigade readout
architecture, which transfers charge across the chip with discrete component readout electronics, results in
clockrate limited readout speeds that cause pileup (saturation) of bright sources and an inherent susceptibility
to radiation induced displacement damage that limits mission lifetime. In contrast, HCDs read pixels with low
power, on-chip multiplexer electronics in a random access fashion. Faster frame rates achieved with multi-output
readout design will allow the next generation's larger effective area telescopes to observe bright sources free of
pileup. Radiation damaged lattice sites effect a single pixel instead of an entire row. Random access, multi-output
readout will allow for novel readout modes such as simultaneous bright-source-fast/whole-chip-slow readout. In
order for HCDs to be useful as X-Ray detectors, they must show noise and energy resolution performance similar
to CCDs while retaining advantages inherent to HCDs. We will report on readnoise, conversion gain, and energy
resolution measurements of an X-Ray enhanced Teledyne HAWAII-1RG (H1RG) HCD and describe techniques
of H1RG data reduction.
Teledyne Imaging Sensors develops and produces high performance silicon-based CMOS image sensors, with associated
electronics and packaging for astronomy and civil space. Teledyne's silicon detector sensors use two technologies:
monolithic CMOS, and silicon PIN hybrid CMOS. Teledyne's monolithic CMOS sensors are large (up to 59 million
pixels), low noise (2.8 e- readout noise demonstrated, 1-2 e- noise in development), low dark current (<10 pA/cm2 at
295K) and can provide in-pixel snapshot shuttering with >103 extinction and microsecond time resolution. The QE
limitation of frontside-illuminated CMOS is being addressed with specialized microlenses and backside illumination. A
monolithic CMOS imager is under development for laser guide star wavefront sensing. Teledyne's hybrid silicon PIN
CMOS sensors, called HyViSITM, provide high QE for the
x-ray through near IR spectral range and large arrays
(2K×2K, 4K×4K) are being produced with >99.9% operability. HyViSI dark current is 5-10 nA/cm2 (298K), and further reduction is expected from ongoing development. HyViSI presently achieves <10 e- readout noise, and new high speed
HyViSI arrays being produced in 2008 should achieve <4 e- readout noise at 900 Hz frame rate. A Teledyne 640×480
pixel HyViSI array is operating in the Mars Reconnaissance Orbiter, a 1K×1K HyViSI array will be launched in 2008 in
the Orbiting Carbon Observatory, and HyViSI arrays are under test at several astronomical observatories. The
advantages of CMOS in comparison to CCD include programmable readout modes, faster readout, lower power,
radiation hardness, and the ability to put specialized processing within each pixel. We present one example of in-pixel
processing: event driven readout that is optimal for lightning detection and x-ray imaging.
In a joint program of Penn State University and Teledyne Imaging Sensors, hybrid CMOS sensors have been developed
for use as X-ray detectors. This detector technology can provide major improvements in performance relative to CCDs,
which are the current standard technology used in the focal planes of X-ray telescopes (e.g. Chandra, XMM, Suzaku, and
Swift). Future X-ray telescope missions are all likely to have significantly increased collection area. If standard CCDs
are used, the effects of saturation (pile-up) will have a major impact, while radiation damage will impact the quality and
lifetime of the detectors. By reading out the hybrid CMOS detector in a pixel-by-pixel fashion at high speeds, with an
energy resolution similar to CCDs, CMOS sensors could increase the range of pile-up free operation by several orders of
magnitude. They are also several orders of magnitude more radiation hard than typical CCDs since they transfer charge
through the thickness of the device, rather than across the length of its surface. Furthermore, hybrid CMOS detectors
can be programmed to read out any variety of windowed regions, which leads to versatility and speed. All of this can be
achieved, in principle, while maintaining the same quantum efficiencies achievable in CCDs. Results of this
development effort and preliminary tests of fabricated detectors will be presented, along with potential applications for
future missions such as EDGE and Constellation-X.
Inter-Pixel capacitance (IPC) is an effect that can occur in bump-bonded hybrid CMOS pixel arrays that employ a source
follower pixel amplifier. IPC can result in the signal in one pixel being sensed by adjacent pixels that are capacitively
coupled. IPC effect is more pronounced in full-depletion silicon hybrid CMOS focal plane arrays than infrared arrays
because of the stronger coupling path through the silicon detector layer. IPC can degrade the image resolution and it can
cause an overestimation of conversion gain (electrons per mV) determined from conventional photon-transfer method
because the IPC "blur" reduces the variance of photon noise. However, the IPC effect can be minimized with
improvements in pixel design, and the conversion gain can be properly calculated, and image resolution can be restored
with deconvolution techniques. In this paper, we report the results of a recent effort to reduce IPC in Teledyne's visible
silicon hybrid CMOS focal plane arrays through pixel design improvements.
Silicon-based hybrid CMOS visible focal plane array technology is emerging as a viable high performance alternative to scientific CCDs. The progress is attributed to the rapid advances in CMOS technology, mature precision flip-chip hybridization of large size and fine pixel arrays, and detector array performance improvements. Its technology readiness level (TRL) for space applications is being enhanced by relevant environmental tests and in-depth characterization of sensor performance. In this paper, we present recent results of Rockwell Scientific's hybrid CMOS silicon focal plane array technology, including large format arrays up to 2048x2048, broadband QE, sensor noise improvement, high radiation hardness, and the higher degree of system integration through on-chip ADCs and companion ASICs.
A high-resolution hybrid visible imager, that is composed of a CMOS readout integrated circuit (ROIC) and a silicon photo-detector array, has been designed. The ROIC is fabricated with a standard 0.25 μm CMOS mixed-mode process with a back-illuminated silicon detector array that is produced at Rockwell Scientific Company (RSC) using RSC's HyViSITM process.
The camera system is designed primarily to record images formed on a scintillator used in pulsed proton radiography experiments. In such experiments, the repetition rate of the proton beam can be as high as 2.8 MHz (358 ns). An imaging system with the desired 1440x1440 pixels resolution would result in an instantaneous readout rate in excess of 5.79 E12 samples/s. To address this issue we designed a pixel with three-frame in-pixel analog storage allowing for a deferred slower readout.
The 26 μm pitch pixel imager is operated in a global shutter mode and features in-pixel correlated double sampling (CDS) for each of the three acquired frames. The CDS operation is necessary to overcome the kTC noise of the integrating node to achieve high dynamic range. A 65 fps continuous readout mode is also provided. The hybridized silicon array has close to 100% fill factor while anti-reflection (AR) coating maximizes its quantum efficiency at the scintillator emission wavelength (~415 nm).
The ROIC is a 720x720, two-side buttable integrated circuit with on-chip 12-bit analog to digital converter (ADC) for digital readout. Timing and biasing are also generated on-chip, and special attention has been given to the power distribution of the pixel-array and snapshot signal buffers. This system-on-chip approach results in a compact and low power camera, an important feature to extend the number of imaged frames by synchronizing multiple cameras.
CMOS-based hybrid silicon focal plane array technology is presented as a high-performance CMOS sensor alternative to CCD technology for future space missions and ground-based telescopes. This paper will discuss the unique performance advantages of the hybrid CMOS arrays, including the very high quantum efficiency from UV to near IR, good spatial resolution at moderate voltage bias, readout commonality with IR detector channels in multi-spectral systems, low noise, low power dissipation, high inherent radiation tolerance, and excellent CMOS functionality afforded by the separately optimized readout circuitry. The ability to retain low noise at high video rates and the fact that CMOS sensors do not suffer the charge transfer efficiency (CTE) degradation of CCDs enable an easy scale-up of CMOS-based FPAs to larger formats without compromising sensor performance. The large hybrid CMOS silicon FPAs up to 2048x2048 format in single chip and 4096x4096 format in mosaic configuration that are demonstrated at Rockwell Scientific will be presented.
We have fabricated a new experimental pixel array using 2mm-thick CdZnTe. The trial arrays have been bump-bonded to the Rockwell PICNIC readout IC which provides low noise read out of pixel signals. First measurements are presented from the detector characterisation, which in particular, demonstrate that a very high bond yield (>99%) was
achieved. It is envisaged that these detectors will be suitable for future X-ray astronomy and planetary missions as well as ground based applications such as non-destructive testing, threat detection and baggage scanning.
Silicon-based hybrid CMOS focal plane array technology offers many advantages needed for both ground-based and space imaging applications. These advantages include enhanced UV and NIR sensitivity, extensive on-chip readout capability, inherent radiation hardness, flexible imaging readout and the ability to provide extremely low noise at high video rates. For infrared imaging applications that involve UV-through visible channels, the readout electronics commonality facilitates a great simplification to system designs. In this paper, Rockwell Scientific CMOS-based hybrid silicon FPA technology and the recent progress are presented. The hybrid FPAs developed include 640x480, 1024x1024 and 2048x2048 formats with pixel sizes ranging from 27μm to 18μm square, featuring a high optical fill factor (~100%), broad-band response (200nm to 1000nm) with high quantum efficiency, and low read noise (<6e-) that approaches astronomy CCDs at 100KHz video rate and surpasses astronomy CCDs at 1MHz rate. Other performance parameters, such as spatial uniformity, dark current, pixel crosstalk/MTF and CMOS features are also discussed.
CMOS-based imaging system-on-chip (i-SoC) technology is successfully producing large monolithic and hybrid FPAs that are superior in many respects to competing CCD-based imaging sensors. The hybrid approach produces visible 2048 by 2048 FPAs with <6 e- read noise and quantum efficiency above 80% from 400 nm to 920 nm; 4096 by 4096 mosaics are now being developed. The monolithic approach produces visible 12-bit imaging system-on-chips such as a 1936 by 1088 with higher quantum efficiency than mainstream CCDs, <25 e- read noise, <0.02% fixed pattern noise, automatic identification and replacement of defective pixels, black-level clamping, total power dissipation of only 180 mW, and various programmable features. Several successors having ≥12 Mpixels are in development. In both cases low-light-level performance is boosted by coupling the sensors to image intensifiers.
Rockwell Space Center is developing low-noise visible and IR imaging sensors and systems for astronomy, high-end commercial, NASA, and advanced military applications. The first science grade 2048 by 2048 HAWAII-2 focal plane array (FPA) for astronomy was recently demonstrated for the SWIR waveband. Science-grade deliveries to the University of Hawaii's Institute for Astronomy, the European Southern Observatory and the Subaru Telescope, among others, will soon start. MWIR/visible 2048 by 2048 HAWAII-2 arrays are also being developed for the NGST program using our process for removing the CdZnTe substrate from the back-side illuminated HgCdTe FPAs to detect visible radiation in addition to IR. Previously, more than 25 science grade 2.5micrometers 1024 by 1024 HAWAII FPAs were delivered for use in many observatories; these typically exhibit < 0.1 e-/s dark current and < 10 e- read noise after correlated double sampling at temperatures above 60K. 1024 by 1024 FPAs development is also continuing; dark current < 1 e-/s has been measured at 140K for a NIR 1024 by 1024 HAWAII array. In a related effort, development of high frame rate, low noise FPAs has begun for wavefront sensing including adaptive optical systems for both visible and NIR/SWIR bands. Hybrid Visible Silicon Imager development is also continuing, expanding the success achieved with prior 640 by 480 FPAs. We are now demonstrating 1024 by 1024 arrays with 0.3-1.05 micrometers response. The silicon detectors in HyViSI FPAs are independently processed on silicon wafers and mated to the same multiplexers fabricated originally for interface to HgCdTe detectors. HyViSI FPA quantum efficiency is > 90 percent with near-100 percent fill factor, and the dark current is negligible with minimum cooling. Our near-term plan to develop 4096 by 4096 visible and IR FPAs will also be discussed.
Silicon-based hybrid CMOS visible focal plane array (FPA) technology is emerging as a strong contender for scientific applications that require broad spectral response with low noise, highly integrated functionality and radiation hardness. CMOS-based FPAs offer many advantages in high speed, low-noise detection and signal processing. As a high performance alternative to advanced CCD imaging arrays, the hybrid design enables independent optimization of the silicon detector array and silicon readout electronics. Multiplexer commonality with the instrument's IR channels is another attractive feature for integrators of sensor sites such as for hyperspectral spectrometers. In this paper, the technical merits of Rockwell's CMOS-based hybrid visible FPAs are described including key detector performance aspects, interface electronics requirements, radiation hardness and concomitant implications for diverse imaging applications. At this time we have developed 640 X 480 and 1024 X 1024 hybrid imagers with approximately equals 100% optical fill factor, high broadband QE spanning ultraviolet (UV) through near infrared (NIR), wide dynamic range, and high pixel operability. Dark current of approximately equals 0.01e-/sec and read noise approximately equals 6e- have been measured on one prototype 1024 X 1024 FPA that uses Hawaii readout integrated circuit (ROIC). Initial radiation data indicate a total ionization dose (TID) tolerance greater than 35 Krad for our standard CMOS process.
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