Dr. Yonghong Yang Profile

Dr. Yonghong Yang

R&D Engineer at Seagate Technology

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Publications (1)

Proceedings Article | 28 May 2004 Paper

Conversion from 50 KeV to DUV mask writer for 90-nm technology critical layers

Dongsung Hong, Prakash Krishnan, Dianna Coburn, Mary Zawadzki, Yonghong Yang, Kent Green, Peter Buck, Curt Jackson, Larry Martinez

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.535882

KEYWORDS: Photomasks, Deep ultraviolet, Semiconducting wafers, Optical proximity correction, Lithography, Electron beam lithography, Error control coding, Metals, Laser systems engineering, Binary data

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One of Cypress’ primary goals for 90-nm generation mask strategy is to control mask costs while not compromising on performance. One key objective is to replace the use of 50-ke V electron beam pattern generation with DUV laser mask lithography where possible. The higher productivity of the DUV laser systems compared to the 50Ke V e-beam platforms offers a unique opportunity for mask cost reduction. Compared to previous i-line generations of laser lithography systems, the DUV laser systems provide significantly improved resolution and pattern fidelity that more closely approaches that of ebeam lithography. We have previously published experimental results demonstrating that the difference in fidelity on the mask between the laser and EB platforms does not always translate to a measurable difference in wafer litho performance or even more importantly to a measurable difference in electrical performance. Through this work, Cypress was able to eliminate the use of 50Ke V ebeam writers for all of their 130nm technology node layers. In some cases the improved performance of the DUV tools was sufficient to replace i-line produced masks where wafer performance was marginal without having to resort to EB lithography. This study addresses the conversion of 50Ke V ebeam layers to DUV laser platform specifically for the critical layers of the Cypress’ 90nm Technology node. EB lithography was originally specified for these layers as a conservative approach in part due to the timing of 90-nm technology development relative to the maturation of the DUV laser mask lithography process. In this study, the electrical performance and wafer yield are evaluated for equivalency in order to take advantage of the lower cost and faster cycletime that use of a ALTA DUV system provides over the 50Ke V VSB systems. In addition, the wafer OPC is not changed between the two mask writing systems in order to allow interchangeable use of the two writing systems if the experimental results indicated no difference in wafer performance.

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