In multi patterning processes, overlay is now entangled with CD including OPC and stochastics. This combined effect is a serious challenge for continued shrink and is driving down the allowed overlay margin to an unprecedented level. We need to do everything to improve overlay where accurate measurement and control of wafer deformation is extremely important. This requires accuracy in overlay metrology that decouples target asymmetry from wafer deformation. Multiwavelength diffraction-based overlay (DBO) is positioned for providing such accuracy while maintaining the required measurement speed. At the same time, with the increase of process complexity in advanced nodes, several new types of target asymmetries are introduced. Some of such asymmetries vary even within the target / grating area (intra-grating) and some are so severe that it impacts the center of gravity shift of the overlay target.
In order to meet the tightened lithography performance requirement for EUV systems, a good on-product focus control with accurate metrology is essential. In this manuscript we report on a novel metrology solution for the EUV on-product focus measurement using YieldStar. The new metrology has been qualified on the Logic product wafers and when combined with the advanced techniques and algorithm shows a performance that is accurate and precise enough to meet EUV requirements. Furthermore, the new methodology provides the opportunity for on-product focus monitoring and control through different scanner interfaces. Here we present a case in which the Imaging Optimizer using the EUV metrology data shows an improvement of over 20% on the focus uniformity.
In leading edge patterning processes, overlay is now entangled with CD including OPC residuals and stochastics. This combined effect is a serious challenge for continued shrink and can be characterized with an Edge Placement Error (EPE) budget containing multi-domain components: global and local CD, local placement errors, overlay errors, etch biases and OPC. EPE defines process capability and ultimately relates to device yield. Understanding the EPE budget leads to efficient ways to monitor process capability and optimize it using EPE based process control applications. We examine a critical EPE use case on a leading edge DRAM node. We start by constructing and verifying the EPE Budget via densely sampled on-product in-device local, global CD and Overlay metrology after the etch process step. EPE budget contributors are ranked according to their impact to overall EPE performance and later with simulated EPE performance improvements per component. A cost/benefit analysis is shown to help choose the most HVM-friendly solutions.
LCDU (Local Critical Dimension Uniformity) is one of the biggest challenges in EUV lithography as well as throughput. High contrast illumination, so called, leaf hexapole illumination is proposed for staggered contact-hole array pattern. Leaf hexapole illumination shows much better LCDU compared with traditional hexapole illumination which has been used in DUV lithography so far. Stochastic noise model which was developed based on the particle nature of photon is updated to supplement a missing term. Model prediction is well matched with experimental results in wide range of wafer CD and mask CD. Further optimization of LCDU and/or dose-to-size can be predicted through mask CD optimization. By using illumination optimization and mask CD optimization technique, EUV single exposure process can be applied below D1z node or beyond.
All wafers moving through a microchip nanofabrication process pass through a lithographic apparatus for most, if not all, layers. With a lithographic apparatus providing a massive amount of data per wafer, this paper will outline how physicsbased models can be used to refine UVLS (ultraviolet level sensor) metrology into four unique inputs for use in a deep learning network. Due to the multi-dimensional cross correlation of our deep learning network, we then show that training to a sparse overlay layout with dense inputs results in a hyper dense overly signature. On a testing dataset blind to the training we show that the accuracy of the predictive computational overlay metrology can capture R2 up to 0.81 of the signature in overlay Y. As a real-world application, we outline how our predictive computational overlay metrology can then be used to designate which wafer combinations, coming from the TWINSCAN system, should have overlay measured with a YieldStar system for possible use with APC (advanced process control).