In order to handle the upcoming 1x DRAM overlay and yield requirements, metrology needs to evolve to more accurately represent product device patterns while being robust to process effects. One way to address this is to optimize the metrology target design. A viable solution needs to address multiple challenges. The target needs to be resistant to process damage. A single target needs to measure overlay between two or more layers. Targets need to meet design rule and depth of focus requirements under extreme illumination conditions. These must be achieved while maintaining good precision and throughput with an ultra-small target. In this publication, a holistic approach is used to address these challenges, using computationally optimized metrology targets with an advanced overlay control loop.
ArF immersion lithography and RETs (Resolution Enhancement Technology) are the most promising technology for
sub 60nm patterning. As the device size shrinks, overlay accuracy has become more important due to small overlap
margin between layers. Overlay performance of immersion process is affected by thermal effect due to water evaporation,
so it shows worse performance than dry process and CD variation in DPT (Double Patterning Technology) process is
affected by overlay performance. So improvement of overlay accuracy became hot issue in realization of future
lithography technology, especially immersion process and double patterning process. Current status of lithography tool
shows 10 ~ 12nm (3sigma) overlay control in front-end process, but this overlay performance is not sufficient for
In this paper, we investigated the causes of overlay variation and tried to improve overlay accuracy in front-end process
of 60nm DRAM device. Therefore, the results in this study can be implemented to new technology such as immersion
and double patterning. First, overlay residual error factor is classified into two types, one is the equipment error factor
and the other is process error factor. Equipment error can be divided into SCMV (Single Chuck Mean Variation) by stage
accuracy variation, chuck to chuck mean and correction factor variation by using twin chuck etc. And process error can
be divided into alignment signal variation by chuck defocus (stage particle by contamination), increase of overlay
residual by material deposition, alignment key height variation by etch loading effect, overlay vernier attack by CMP
(Chemical Mechanical Polishing) process etc. We analyzed causes of these overlay error factor and we applied new
system and process to improve these overlay error factor.
In conclusion, we were able to find where overlay error comes from and how to improve overlay accuracy in 60nm
device, and we got good overlay performance using new alignment system and process optimization.
Though immersion lithography is on the verge of starting mass-production, demerit in overlay controllability by
immersion is thought as one of last huddle for that. The first issue in immersion tool has not been matured compared to
dry tool. As design rule is getting smaller, overlay specification is also changing the same way. But immersion tool is
not ready to meet this tighter overlay specification. The second issue is regarding the material which is used for
immersion process: top coat and water. Process details of material are needed to be verified thoroughly about how each
parameter affect on alignment and overlay respectively. In this paper, we made a split experiment about machine
parameter and investigated top coat effect on overlay. To improve overlay performance of immersion, we analyzed
machine parameters: scan-speed, settling time, UPW(Ultra Pure Water) flow etc. And we made an experiment about
how the effect of top coat is appeared on overlay through simulation and experiment. In the experiments, we used
ASML 1400i scanner. Resolution improvement of immersion tool has been proved by lots of papers, but it is need to be
verified of overlay controllability that getting tighter. Continuously, we believe that most efforts are to be focused on
overlay control issue.
Double patterning lithography has been one of the candidates for sub-40nm patterning era, and has a lot of process
issues to be confirmed. Last year, we presented the issues in double patterning lithography with a real flash gate pattern.
Process flow was suggested and CD uniformity due to overlay was analyzed. And the layout decomposition and the two
types of double patterning of positive and negative tone were studied with 1-dimensional pattern. In this paper, the
implementation to DRAM patterns is examined, which consist of 2-dimensional patterns. Double patterning methods and
the selection of their tone for each layer are studied, and the difficulties from the randomness of core pattern are also
considered. As a result, DRAM patterns have more restrictions on the double patterning method and selection of tone,
and the aggressive layout decomposition should be designed to solve the difficulty in core patterning. Therefore, 37nm
DRAM layout can be patterned and the overlay control and cost still remain as dominant obstacles.
ArF lithography has shrunk photo resist patterns down to 60nm from 80nm with the help of various RETs (resolution enhancement technologies). Photo resist thickness also has been thinner than ever to increase image contrast and DoF margin and to avoid pattern collapse due to high aspect ratio. Etching process became more difficult and marginal by using thin resist patterning so that new BARC materials having high etching selectivity are required. Since amorphous carbon (a-C) and SiON have good etch selectivity between them, they can be used as hard mask materials for thin resist process. Lithographic alignment system usually uses the light of 400 to 700nm. In general a-C has certain level of light absorption in this wavelength range and the absorption coefficient increases with deposition temperature of a-C. Because a-C film is not suitably transparent to the alignment light, overlay control might get worsen as the thickness of a-Carbon film increased. In this paper, we will present the effect of the thickness of a-Carbon film on alignment signal strength, alignment accuracy and overlay control of various layers. Simulation of alignment signal is conducted and compared with experiment results. It is also studied whether the overlay control can be improved by changing the spectrum of alignment light or structural design of alignment marks. Improvements on alignment accuracy and overlay control are examined by lowering the extinction coefficient, k of a-Carbon film.
In conclusion, because photo resist only is not sufficient for a mask during etch step as the thickness decreased further, adoption of new hard mask is inevitable. It is the alignment trouble for a-Carbon that should be cleared before being named as a main stream of new hard mask.
Double patterning lithography is very fascinating way of lithography which is capable of pushing down the k1 limit below 0.25. By using double patterning lithography, we can delineate the pattern beyond resolution capability. Target pattern is decomposed into patterns within resolution capability and decomposed patterns are combined together through twice lithography and twice etch processes. Two ways, negative and positive, of doing double patterning process are contrived and studied experimentally. In this paper, various issues in double patterning lithography such as pattern decomposition, resist process on patterned topography, process window of 1/4 pitch patterning, and overlay dependent CD variation are studied on positive and negative tone double patterning respectively. Among various issues about double patterning, only the overlay controllability and productivity seemed to be dominated as visible obstacles so far.
512Mbit DRAM with 70 nm design rule was tailored using 0.31k1 ArF lithography technologies. Of the critical mask layers, four pattern layouts were demonstrated: brick wall, line/space, contact and line/contact patterns. For the sake of cost reduction, the conventional technologies were used. Results has shown that SLR (Single-Layer Resist) process, half-tone PSM and the conventional illuminations had a potential of manufacturing 70 nm DRAM. However, it was found that brick wall patterns had asymmetrical shape and total CD uniformity was out of target raging 9.2 nm through 16.3 nm depending mask layouts. We prospect that higher contrast resist and more elaborate resist process will address these problems sooner or later. In case the immersion lithography is not ready around the right time, the feasibility of 0.29k1 ArF lithography was studied through simulation and test, which represented that 0.29k1 technologies were likely to be applied for the development of 60 nm DRAM with the aid of RETs (Resolution Enhancement Technologies) including customized illumination and new hard mask process.
In-house rinse, HR31 has a strong point in terms of lithographic performance, defect, bubble, and metal impurity. The collapse behavior was quantified in terms of SMCD (Standing Minimum CD) in 80nm dense L/S ArF resist patterns. It contributed to enlarging process window by improving collapse (SMCD: 84→72nm), CD uniformity (12.3→9.3nm), and lithographic margin [EL (11.7→12.8%), and DOF (0.20→0.25µm)].
As the pattern size decreases, the thickness of resist also should be decreased owing to the pattern collapse problem. So the using of surfactant containing rinse material, instead of DI water, can be a solution to the collapse problem. The developing of Bottom Anti Reflective Coating (BARC) that has high etch rate will be helpful to the collapse issue because it enables low thickness resist process and pattern collapse will be decrease. In this paper, Polyacetal, polyacrylate and polyesters BARCs were evaluated. Polyacetal type BARC shows best coating property. Regardless of the topology, polyacetal type BARC shows good conformality. However, polyacrylate and polyesters show coating fail on the topology wafer. In terms of pattern collapse, polyacetal type BARC also shows best results. Among the three types of BARC, ArF BARC that is made by polyester resin shows highest etch rate after 2000ÅBRAC etch. However, when the etching target is 60nm, all BARCs have same etch rate. For the matching with line and space resist, all these three BARCs show good profile. However, polyester type BARC does not match with contact hole resist and could not define contact hole pattern.
To accomplish minimizing feature size to sub 100nm, new light sources for photolithography are emerging, such as ArF(193nm), F2(157nm), and EUV(13nm). However as the pattern size decreases to sub 100nm, a new obstacle, that is pattern collapse problem, becomes most serious bottleneck to the road for the sub 100 nm lithography. The main reason for this pattern collapse problem is capillary force that is increased as the pattern size decreases. As a result there were some trials to decrease this capillary force by changing developer or rinse materials that had low surface tension. On the other hands, there were other efforts to increase adhesion between resists and sub materials (organic BARC). In this study, we will propose a novel approach to solve pattern collapse problems by increasing contact area between sub material (organic BARC) and resist pattern. The basic concept of this approach is that if nano-scale topology is made at the sub material, the contact area between sub materials and resist will be increased. The process scheme was like this. First after coating and baking of organic BARC material, the nano-scale topology (3~10nm) was made by etching at this organic BARC material. On this nano-scale topology, resist was coated and exposed. Finally after develop, the contact area between organic BARC and resist could be increased. Though nano-scale topology was made by etching technology, this 20nm topology variation induced large substrate reflectivity of 4.2% and as a result the pattern fidelity was not so good at 100nm 1:1 island pattern. So we needed a new method to improve pattern fidelity problem. This pattern fidelity problem could be solved by introducing a sacrificial BARC layer. The process scheme was like this. First organic BARC was coated of which k value was about 0.64 and then sacrificial BARC layers was coated of which k value was about 0.18 on the organic BARC. The nano-scale topology (1~4nm) was made by etching of this sacrificial BARC layer and then as the same method mentioned above, the contact area between sacrificial layer and resist could be increased. With this introduction of sacrificial layer, the substrate reflectivity of sacrificial BARC layer was decreased enormously to 0.2% though there is 20nm topology variation of sacrificial BARC layer. With this sacrificial BARC layer, we could get 100nm 1:1 L/S pattern. With conventional process, the minimum CD where no collapse occurred, was 96.5nm. By applying this sacrificial BARC layer, the minimum CD where no collapse occurred, was 65.7nm. In conclusion, with nano-scale topology and sacrificial BARC layer, we could get very small pattern that was strong to pattern collapse issue.
To accomplish minimizing feature size to sub 100nm, new light sources for photolithography are emerging, such as ArF((lambda) =193nm), F2((lambda) =157nm), and EUV(extremely Ultraviolet, (lambda) =13nm). Among these lithography technologies, ArF lithography will be used for 100nm and sub 100nm lithography. Past few years, ArF resist development has been the key issue for the success of ArF lithography. Now the resist problems are solved clearly and it is time to start on logic and DRAM real device fabrication using ArF lithography. In this study we will show all the resist process for 100nm real DRAM using ArF resist. For critical layers with no etching problems (Striation, PR Deformation etc.), the acrylate type resist was used. While the other critical layers, such as oxide layers, the COMA type resist was adapted to avoid the etching problem. Furthermore, we have optimized resist process and etching conditions, along with additional E-beam curing was minimized (only 2~3 layer is required) for the real device production. In case of contact hole patterns, the 110nm contact hole could be obtained successfully without additional process sch as RFP(Resist Flow Process) or RELACS(Resolution Enhancement Lithography Assisted by Chemical Shrink), leading to a good patterning and etching performance applicable to even below 100nm node tech.
For the fabrication of IC devices, the patterning of C/H (contact holes) is essential but very difficult in comparison with L/S (lines and spaces). 193nm lithography following KrF lithography is expected to play a main role in 0.1micrometers technology node. However, many lithographers have reported various troubles such as poor profiles, resist shrinkage, and pattern edge roughness due to inherent flaws of ArF resist materials. In this study, we noticed such complex issues relating to patterning C/H and evaluated two resists (acrylate, ROMA), which are promising materials among ArF resists, at the condition of various baking temperatures of the soft bake and the post exposure bake. And then we investigated lithographic capability (resolution limit, exposure latitude, depth of focus, and CD uniformity) at the optimum bake conditions. Besides, the resist flow properties were estimated on both resists, respectively. Throughout experimentals, we were able to observe ArF resist properties for bake conditions and find optimum temperatures to improve several issues occurred on C/H pattern. Thus we directly achieved 0.12~0.10 micrometers C/H and also decade- nanometer C/H by applying the resist flow process.
Due to miniaturization of semiconductor devices, ArF (193nm) lithography is likely expected to be used for sub 100nm regime. For sub 100nm devices, high NA (>=0.70) exposure tools and various strong off-axis illumination (OAI) conditions should be used. But unlike KrF (248nm) lithography, resist pattern collapse becomes one of the most serious problems in ArF lithography. In order to solve pattern collapse problem, thin resist process is generally introduced but its poor etch resistance is an obstacle for being applied in real production process. Due to this reason, new kinds of organic BARC materials are investigated and optimized to avoid pattern collapse. As mentioned, the most important issue in ArF organic BARC is believed to be the pattern collapse problem. A number of organic BARCs were made by varying polymer, cross-linker, thermal acid generator, and additive. We tried to analyze the key factor in terms of pattern collapse. This paper is to compare the various elements of the organic BARC formulation and to discuss what brings and causes pattern collapse.
To accomplish minimizing feature size to sub 70nm, 157nm photolithography becomes a strong candidate as a new lithographic technology. However, there is a strong need for new photoresists, which are transparent to 157nm light sources. To have a transparency for 157nm light source, fluorinated organic polymers are studied intensively. As a result, there are some of polymers that have absorbance of 2/micrometers . However, in spite of this low absorbance of 2micrometers , resist profile simulation tells us bulk slope problems. TO obtain more than 85 degree of resist pattern profile, the absorbance of resist must be 1.2micrometers . The absorbance of 1.2micrometers is very difficult target to accomplish. To overcome this light absorption problem, we have developed amine gradient resist process (AGRP) which gives an amine gradient in photoresist and can make a vertical profile though the resist has poor transparency to light source. By adding chromophore that absorbs 193nm wavelength, we made model ArF resists of which absorbances were from 1.2micrometers to 4micrometers . By patterning experiment using these model resists and 193nm scanner, we could confirm that the resist absorbance should be lower than 1.2micrometers to obtain vertical profile pattern at the resist thickness of 150nm. But if we use AGRP, the absorbance of 2.5micrometers will be enough value for the vertical profile pattern. So we could conclude that by combining 157nm resists and amine gradient process, resist absorbance problem in 157nm photolithography could be solved. We also studied for the resist properties that were suitable for AGRP.