Ms. Yu-Jin Pyo Profile

Yu-Jin Pyo

at SAMSUNG Electronics Co Ltd

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Author

Publications (2)

Proceedings Article | 5 April 2011 Paper

Statistical approach to specify DPT process in terms of patterning and electrical performance of sub-30nm DRAM device

Yu-Jin Pyo, Soo-Han Choi, Chul-Hong Park, Sang-Hoon Lee, Moon-Hyun Yoo, Gyu-Tae Kim

Proceedings Volume 7974, 797413 (2011) https://doi.org/10.1117/12.869978

KEYWORDS: Critical dimension metrology, Optical lithography, Lithography, Error analysis, Photomasks, Monte Carlo methods, Capacitance, Overlay metrology, Resistance, Transistors

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Proceedings Article | 13 March 2009 Paper

Statistical approach to design DRAM bitcell considering overlay errors

Yu-Jin Pyo, Dae-Wook Kim, Jai-Kyun Park, Ji-Seong Doh, Hyun-Jae Kang, Ji-Suk Hong, Chul-Hong Park, Sang-Hoon Lee, Moon-Hyun Yoo

Proceedings Volume 7275, 72751L (2009) https://doi.org/10.1117/12.815341

KEYWORDS: Overlay metrology, Surface plasmons, Critical dimension metrology, Statistical analysis, Manufacturing, Resistance, Error analysis, Monte Carlo methods, Optical lithography, Process control

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