Mask synthesis and correction flows are becoming increasingly complex in order to deal with increasingly smaller lithography, resist, and etch effects that also increase in importance with increasingly smaller feature sizes. Time-to-mask is also a significant factor in production environments which leads tapeout teams to adopt correction strategies that usually only address effects at the best process condition. As a result, users frequently find hotspots, or process failures, when performing a final lithography verification step using multiple process conditions. In many cases, under production pressure to decrease time-to-mask, tapeout teams choose to correct these hotspots in the fastest manner possible. Performing rule-based fixes to the post-correction layout is usually the fastest method available. This paper will explore using rule-based, post-correction hotspot fixes in a flow using pattern matching. Pattern matching will be used to cluster the post-correction patterns into similar types which will be fixed by different algorithms for each type. Further, pattern matching will be used to find all instances of each pattern to mark for fixing along any similar patterns that may have been missed by the lithography check, or those that received asymmetrical correction.
As the design layout of integrated circuits (ICs) is continually scaling down, sub-resolution assist features (SRAF) have been extensively used in resolution enhancement technique (RET) applications to enhance lithography printing fidelity and widen the manufacturing process window (PW). With conventional SRAF insertion techniques, rule-based SRAF (RB-SRAF) and model-based SRAF (MB-SRAF) methods have been widely adopted. The typical RB-SRAF is an efficient method to generate SRAFs consistently for simple designs, but cannot be optimized for multiple critical patterns or complex layout schemes. Although MB-SRAF is able to achieve better process window as well as reducing conflicts between placement rules and clean-up rules, many iterations for convergence and extremely high computational costs are required. The explosion of machine learning techniques could facilitate the complex processes of mask optimization, such as SRAF insertion. In this paper, generative adversarial network was studied on a Via layer of advanced 3D NAND flash memory, by training target images and Inverse Lithography Technology (ILT) images of target patterns. GAN models, pix2pix and CycleGAN, were first trained and then utilized to synthesize realistic ILT images. These ILT images were eventually translated to polygons of SRAF with simplification process and mask manufacturing rules check (MRC) constraints. The simulation results demonstrate that CycleGAN approach can place SRAF with comparable performance to mask optimization (MO) result which was optimized by the Tachyon Source-Mask Optimizer (SMO). Most importantly, the efficiency of SRAF insertion can be enhanced significantly through the generative adversarial network.