Proc. SPIE. 7875, Sensors, Cameras, and Systems for Industrial, Scientific, and Consumer Applications XII
KEYWORDS: Data compression, Image compression, 3D acquisition, High dynamic range image sensors, Image quality, Image sensors, High dynamic range imaging, Transistors, Integrated circuits, 3D image processing
High Dynamic Range (HDR) Image sensors aim at having a dynamic over 120dB. Compared to classical architectures
this is obtained at the cost of a higher transistor count, thus lower fill factor. Three Dimensional integrated circuits (3DIC)
somehow change the constraints, photodiodes and electronics can be stacked on different layers, giving more
processing powers without compromising the fill factor.
In this paper, we propose an original architecture for a high dynamic 3D image sensor with data reduction obtained by
local compression. HDR acquisition is based on a floating point coding shared by a group of pixel (macro-pixel), thus
giving also a first level of compression. A second level of compression is performed by using a Discrete Cosine
Transform (DCT). With this new concept a good image quality (PSNR of about 40 dB) and a high dynamic range (120
dB) are obtained within a pixel area of 5μm×5μm.
A CMOS, self-biased transconductance amplifier has been designed to be associated and integrated with a silicon capacitive microphone. To meet requirements especially on gain sensitivity, power consumption, and minimization of parasite capacitance effect, we have proposed a cascode structure with the cascode transistor source used as signa input. Switched-capacitor techniques have been applied for realizing self-bias for the amplifier and ensuring its high- gain operation. The proposed amplifier has been designed and fabricated in a 0.8 micrometers CMOS process. It has a surface area of 210 micrometers by 170 micrometers . Experimental results obtained from measuring the fabricated chip show a high-gain sensitivity and a low power dissipation for the amplifier. Results of simulations and measurements have been discussed.
Conference Committee Involvement (2)
Microelectronics: Design, Technology, and Packaging III
5 December 2007 | Canberra, ACT, Australia
Microelectronics: Design, Technology, and Packaging II