To handle upcoming advanced technology nodes, the spec of focus control continues to tighten to satisfy more stringent CD uniformity (CDU). In high volume manufacturing (HVM) nowadays, yield at wafer edge suffers from CDU degradation due to process variation like edge roll-off topography. Advance focus control using diffraction-based focus (DBF) was proposed as one solution; we can apply the focus compensation values, which are determined from DBF measurement. However, the confidence of the focus compensation depends on the accuracy of focus measurement, which is a widely recognized challenge in the industry. In this paper, we have investigated the performance and the accuracy of two different designs of DBF marks by collecting full maps of DBF measurements. The measurement shows different signatures cross wafer from the two designs. For focus accuracy validation, CDU maps of several focus sensitive patterns have been collected and analyzed against the defocus measurement results. Our results demonstrate that with the accuracy improved DBF design and focus correction per exposure (CPE) schematic, the CDU is improved by 20%, at the wafer edge. We find that the dimension of the DBF main pattern (W1) dominates the accuracy of focus measurement. A DBF design guideline is proposed that the main pattern dimension (W1) should be close to device focus sensitive pattern size to capture its defocus signature more effectively. The accuracy of focus measurement benefits from designs that are close to device weak point patterns, which in turn improves the overall CD uniformity.
With each technology node, overall focus budgets have become increasingly tighter in order to meet the necessary product requirements. The 7nm node has required us to define new opportunities for addressing top contributors to the focus budget. Field curvature in particular has been identified as a key contributor to the intrafield focus budget, contributing around 50%. This paper will introduce two new methodologies for improving field curvature; one a hardware solution and one a software solution.
As the demand of the technology node shrinks from 14nm to 7nm, the reliability of tool monitoring techniques in advanced semiconductor fabs to achieve high yield and quality becomes more critical. Tool health monitoring methods involve periodic sampling of moderately processed test wafers to detect for particles, defects, and tool stability in order to ensure proper tool health. For lithography TWINSCAN scanner tools, the requirements for overlay stability and focus control are very strict. Current scanner tool health monitoring methods include running BaseLiner to ensure proper tool stability on a periodic basis. The focus measurement on YIELDSTAR by real-time or library-based reconstruction of critical dimensions (CD) and side wall angle (SWA) has been demonstrated as an accurate metrology input to the control loop. The high accuracy and repeatability of the YIELDSTAR focus measurement provides a common reference of scanner setup and user process. In order to further improve the metrology and matching performance, Diffraction Based Focus (DBF) metrology enabling accurate, fast, and non-destructive focus acquisition, has been successfully utilized for focus monitoring/control of TWINSCAN NXT immersion scanners. The optimal DBF target was determined to have minimized dose crosstalk, dynamic precision, set-get residual, and lens aberration sensitivity. By exploiting this new measurement target design, ~80% improvement in tool-to-tool matching, >16% improvement in run-to-run mean focus stability, and >32% improvement in focus uniformity have been demonstrated compared to the previous BaseLiner methodology. Matching <2.4 nm across multiple NXT immersion scanners has been achieved with the new methodology of set baseline reference. This baseline technique, with either conventional BaseLiner low numerical aperture (NA=1.20) mode or advanced illumination high NA mode (NA=1.35), has also been evaluated to have consistent performance. This enhanced methodology of focus control and monitoring on multiple illumination conditions, opens an avenue to significantly reduce Focus-Exposure Matrix (FEM) wafer exposure for new product/layer best focus (BF) setup.
With decreasing CDOF (Critical Depth Of Focus) for 20/14nm technology and beyond, focus errors are becoming increasingly critical for on-product performance. Current on product focus control techniques in high volume manufacturing are limited; It is difficult to define measurable focus error and optimize focus response on product with existing methods due to lack of credible focus measurement methodologies. Next to developments in imaging and focus control capability of scanners and general tool stability maintenance, on-product focus control improvements are also required to meet on-product imaging specifications. In this paper, we discuss focus monitoring, wafer (edge) fingerprint correction and on-product focus budget analysis through diffraction based focus (DBF) measurement methodology. Several examples will be presented showing better focus response and control on product wafers. Also, a method will be discussed for a focus interlock automation system on product for a high volume manufacturing (HVM) environment.
As leading edge lithography moves to advanced nodes, CDU requirements have relatively increased with technologies 14nm/20nm and beyond. In this paper, we want to introduce the methodology to offer an itemized CDU budget such as Intra-field, Inter-field, wafer to wafer as well as scanner contributors vs. non-scanner contributors (including detailed analysis of reticle contributors like CD, absorber thickness and SWA variation) through Top-Down CDU and Bottom-Up CDU budget breakdown and deliver sources of CD variation with measureable value so that we can estimate CDU gain from them. The test vehicle being used in this experiment is designed based on 14nm D/R basis. Measurement structures are densely located in the slit/scan direction on the reticle for the data collection plan. Hence, we can expand on this methodology to build up the tool reference fingerprint when we release new tool fleet. The final goal will be to establish a methodology for CDU budget breakdown that can be used to draw a conclusion on the root causes of the observed CDU, propose its improvement strategy and estimate the gain.
CD uniformity requirements at 20nm and more advanced nodes have challenged the precision limits of CD-SEM metrology, conventionally used for scanner qualification and in-line focus/dose monitoring on product wafers. Optical CD metrology has consequently gained adoption for these applications because of its superior precision, but has been limited adopted, due to challenges with long time-to-results and robustness to process variation. Both of these challenges are due to the limitations imposed by geometric modeling of the photoresist (PR) profile as required by conventional RCWA-based scatterometry. Signal Response Metrology (SRM) is a new technique that obviates the need for geometric modeling by directly correlating focus, dose, and CD to the spectral response of a scatterometry tool. Consequently, it suggests superior accuracy and robustness to process variation for focus/dose monitoring, as well as reducing the time to set up a new measurement recipe from days to hours. This work describes the fundamental concepts of SRM and the results of its application to lithography metrology and control. These results include time to results and measurement performance data on Focus, Dose and CD measurements performed on real devices and on design rule metrology targets.
There are various data mining and analysis tools in use by high-volume semiconductor manufacturers throughout the industry that seek to provide robust monitoring and analysis capabilities for the purpose of maintaining a stable lithography process. These tools exist in both online and offline formats and draw upon data from various sources for monitoring and analysis. This paper explores several possible use cases of run-time scanner data to provide advanced overlay and imaging analysis for scanner lithography signatures. Here we demonstrate several use-cases for analyzing and stabilizing lithography processes. Applications include high order wafer alignment simulations in which an optimal alignment strategy is determined by dynamic wafer selection, reporting statistics data and analysis of the lot report and the sub-recipe as a sort of non-standard lot report, visualization of key lithography process parameters, and scanner fleet management (SFM)
As leading edge lithography moves to advanced nodes in high-mix, high-volume manufacturing environment, automated control of critical dimension (CD) within wafer has become a requirement. Current control methods to improve CD uniformity (CDU) generally rely upon the use of field by field exposure corrections via factory automation or through scanner sub-recipe. Such CDU control methods are limited to lithography step and cannot be extended to etch step. In this paper, a new method to improve CDU at post etch step by optimizing exposure at lithography step is introduced. This new solution utilizes GLOBALFOUNDRIES’ factory automation system and KLA-Tencor’s K-T Analyzer as the infrastructure to calculate and feed the necessary field by field level exposure corrections back to scanner, so as to achieve the optimal CDU at post etch step. CD at post lithography and post etch steps are measured by scatterometry metrology tools respectively and are used by K-T Analyzer as the input for correction calculations. This paper will explain in detail the philosophy as well as the methodology behind this novel CDU control solution. In addition, applications and use cases will be reviewed to demonstrate the capability and potential of this solution. The feasibility of adopting this solution in high-mix, high-volume manufacturing environment will be discussed as well.
As photolithography will continue with 193nm immersion multiple patterning technologies for the leading edge HVM process node, the production overlay requirement for critical layers in logic devices has almost reached the scanner hardware performance limit. To meet the extreme overlay requirements in HVM production environment, this study investigates a new integrated overlay control concept for leading edge technology nodes that combines the run-to-run (R2R) linear or high order control loop, the periodic field-by-field or correction per exposure (CPE) wafer process signature control loop, and the scanner baseline control loop into a single integrated overlay control path through the fab host APC system. The goal is to meet the fab requirements for overlay performance, lower the cost of ownership, and provide freedom of control methodology. In this paper, a detailed implementation of this concept will be discussed, along with some preliminary results.
As leading edge lithography moves to advanced nodes which requires better critical dimension (CD) control ability within wafer. Current methods generally make exposure corrections by field via factory automation or by sub-recipe to improve CD uniformity. KLA-Tencor has developed a method to provide CD uniformity (CDU) control using a generated Focus/Exposure (F/E) model from a representative process. Exposure corrections by each field can be applied back to the scanner so as to improve CD uniformity through the factory automation. CDU improvement can be observed either at after lithography or after etch metrology steps. In addition to corrections, the graphic K-T Analyzer interface also facilitates the focus/exposure monitoring at the extreme wafer edge. This paper will explain the KT CDFE method and the application in production environment. Run to run focus/exposure monitoring will be carried out both on monitoring and production wafers to control the wafer process and/or scanner fleet. CDU improvement opportunities will be considered as well.