Paper
25 November 1987 NOSC Advanced Systolic Array Processor (ASAP)
Joseph P. Loughlin
Author Affiliations +
Abstract
The design of a high-speed (250 million 32-bit floating point operations per second) two dimensional systolic array composed of 16 bit/slice microsequencer structured processors will be presented. System design features such as broadcast data flow, tag bit movement, and integrated diagnostic test registers will be described. The software development tools needed to map complex matrix-based signal processing algorithms onto the systolic processor system will be described.
© (1987) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Joseph P. Loughlin "NOSC Advanced Systolic Array Processor (ASAP)", Proc. SPIE 0827, Real-Time Signal Processing X, (25 November 1987); https://doi.org/10.1117/12.942052
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Signal processing

Data communications

Control systems

Diagnostics

Computing systems

Algorithm development

Array processing

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