PAM4 silicon photonic microring resonator-based transceiver circuits

Samuel Palermo; Kunzhi Yu; Ashkan Roshan-Zamir; Binhao Wang; Cheng Li; M. Ashkan Seyedi; Marco Fiorentino; Raymond Beausoleil

doi:10.1117/12.2253310

20 February 2017 PAM4 silicon photonic microring resonator-based transceiver circuits

Samuel Palermo, Kunzhi Yu, Ashkan Roshan-Zamir, Binhao Wang, Cheng Li, M. Ashkan Seyedi, Marco Fiorentino, Raymond Beausoleil

Author Affiliations +

Proceedings Volume 10109, Optical Interconnects XVII; 101090F (2017) https://doi.org/10.1117/12.2253310
Event: SPIE OPTO, 2017, San Francisco, California, United States

Abstract

Increased data rates have motivated the investigation of advanced modulation schemes, such as four-level pulseamplitude modulation (PAM4), in optical interconnect systems in order to enable longer transmission distances and operation with reduced circuit bandwidth relative to non-return-to-zero (NRZ) modulation. Employing this modulation scheme in interconnect architectures based on high-Q silicon photonic microring resonator devices, which occupy small area and allow for inherent wavelength-division multiplexing (WDM), offers a promising solution to address the dramatic increase in datacenter and high-performance computing system I/O bandwidth demands. Two ring modulator device structures are proposed for PAM4 modulation, including a single phase shifter segment device driven with a multi-level PAM4 transmitter and a two-segment device driven by two simple NRZ (MSB/LSB) transmitters. Transmitter circuits which utilize segmented pulsed-cascode high swing output stages are presented for both device structures. Output stage segmentation is utilized in the single-segment device design for PAM4 voltage level control, while in the two-segment design it is used for both independent MSB/LSB voltage levels and impedance control for output eye skew compensation. The 65nm CMOS transmitters supply a 4.4V_ppd output swing for 40Gb/s operation when driving depletion-mode microring modulators implemented in a 130nm SOI process, with the single- and two-segment designs achieving 3.04 and 4.38mW/Gb/s, respectively. A PAM4 optical receiver front-end is also described which employs a large input-stage feedback resistor transimpedance amplifier (TIA) cascaded with an adaptively-tuned continuous-time linear equalizer (CTLE) for improved sensitivity. Receiver linearity, critical in PAM4 systems, is achieved with a peak-detector-based automatic gain control (AGC) loop.

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Citation Download Citation

Samuel Palermo, Kunzhi Yu, Ashkan Roshan-Zamir, Binhao Wang, Cheng Li, M. Ashkan Seyedi, Marco Fiorentino, and Raymond Beausoleil "PAM4 silicon photonic microring resonator-based transceiver circuits", Proc. SPIE 10109, Optical Interconnects XVII, 101090F (20 February 2017); https://doi.org/10.1117/12.2253310

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